AIP24C02ASA8.TR

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  "slug": "aip24c02asa8-tr",
  "title": "AIP24C02ASA8.TR",
  "brief": "Wuxi I core Elec Shifting Register, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "logic",
    "aip24c02asa8.tr"
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  "component": {
    "mpn": "AIP24C02ASA8.TR",
    "manufacturer": "Wuxi I core Elec",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Logic",
    "subcategory": "Shifting Register",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2205241716_Wuxi-I-core-Elec-AIP24C02ASA8-TR_C3024252.pdf",
    "parts": {
      "symbol": "aip24c02asa8-tr.kicad_sym",
      "footprint": "aip24c02asa8-tr.kicad_mod",
      "model_3d": "aip24c02asa8-tr-etched.glb",
      "model_3d_plain": "aip24c02asa8-tr.glb",
      "model_3d_step": "aip24c02asa8-tr-etched.step",
      "model_3d_step_plain": "aip24c02asa8-tr.step",
      "lbr": "aip24c02asa8-tr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "A0",
        "type": "input",
        "description": "Device address input bit 0. A2/A1/A0 form the programmable slave address bits, allowing up to 8 devices (2K each) on a single I2C bus."
      },
      {
        "number": "2",
        "name": "A1",
        "type": "input",
        "description": "Device address input bit 1. Tie to VCC or GND to set the chip's I2C slave address."
      },
      {
        "number": "3",
        "name": "A2",
        "type": "input",
        "description": "Device address input bit 2. Tie to VCC or GND to set the chip's I2C slave address."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "5",
        "name": "SDA",
        "type": "bidirectional",
        "description": "I2C serial data. Bidirectional open-drain line; requires an external pull-up resistor to VCC. Can be wire-OR'd with other open-drain/open-collector devices."
      },
      {
        "number": "6",
        "name": "SCL",
        "type": "input",
        "description": "I2C serial clock input. Data is latched into the EEPROM on the rising edge and clocked out on the falling edge. Up to 400 kHz at 1.8-2.5 V and 1 MHz at 2.5-5.5 V."
      },
      {
        "number": "7",
        "name": "WP",
        "type": "input",
        "description": "Write protect. Tie to GND to allow normal read/write of the entire array; tie to VCC to hardware write-protect all 2K of memory."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage, 1.8 V to 5.5 V. Absolute max 6.25 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2205241716_Wuxi-I-core-Elec-AIP24C02ASA8-TR_C3024252.pdf",
        "pages": 16,
        "sha256": "c9d6142c9bf9cff7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
    },
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        "file": "aip24c02asa8-tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "aip24c02asa8-tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
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        "extents_mm": [
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        "sha256": "8cc912909d24688c58bfd3f8b0ed3c79ff4a4a109ea7cae859f652d5e477f27e",
        "checked": "2026-11-03",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Wuxi I core Elec",
      "Package": "SOP-8",
      "Category": "Logic",
      "Pins": "8"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
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  "discovery_pitch": "AIP24C02ASA8.TR (Wuxi I core Elec) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "aip24c02asa8-tr.kicad_sym",
    "aip24c02asa8-tr.kicad_mod",
    "aip24c02asa8-tr.glb",
    "aip24c02asa8-tr.step",
    "aip24c02asa8-tr-etched.step",
    "aip24c02asa8-tr.lbr",
    "docs/hero.png",
    "docs/aip24c02asa8-tr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
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  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T16:11:27.806Z"
}