component
AIC1519N-0GS8TR
Public Made by Adomby adom
AIC Analog Integrations AC-DC Controllers and Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
aic1519n-0gs8tr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2e0f087
27d ago
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{
"schema_version": 1,
"type": "component",
"slug": "aic1519n-0gs8tr",
"title": "AIC1519N-0GS8TR",
"brief": "AIC Analog Integrations AC-DC Controllers and Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
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"pmic",
"aic1519n-0gs8tr"
],
"component": {
"mpn": "AIC1519N-0GS8TR",
"manufacturer": "AIC Analog Integrations",
"package": "SOP-8",
"pin_count": 8,
"category": "PMIC",
"subcategory": "AC-DC Controllers and Regulators",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/298a279639196887e272207a99381258.pdf",
"parts": {
"symbol": "aic1519n-0gs8tr.kicad_sym",
"footprint": "aic1519n-0gs8tr.kicad_mod",
"model_3d": "aic1519n-0gs8tr-etched.glb",
"model_3d_plain": "aic1519n-0gs8tr.glb",
"model_3d_step": "aic1519n-0gs8tr-etched.step",
"model_3d_step_plain": "aic1519n-0gs8tr.step",
"lbr": "aic1519n-0gs8tr.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "CTLA",
"type": "input",
"description": "Enable / control input for channel A high-side switch. Active-LOW on the AIC1519N-0 variant (Logic 0 = switch ON). Logic thresholds: VIL ≤ 0.8 V, VIH ≥ 2.4 V; input current ~0.01 µA; input capacitance ~1 pF; absolute max -0.3 V to +7 V."
},
{
"number": "2",
"name": "FLGA",
"type": "output",
"description": "Open-drain fault flag output for channel A. Pulled LOW when channel A is in over-current limiting, thermal shutdown, or UVLO. Requires an external pull-up (typ 10 kΩ to Vcc). Absolute max VFLG = 7 V, IFLG = 50 mA; on-resistance ~15 Ω at VIN = 5 V, IL = 10 mA."
},
{
"number": "3",
"name": "FLGB",
"type": "output",
"description": "Open-drain fault flag output for channel B. Pulled LOW during over-current, thermal shutdown, or UVLO on channel B. Requires external pull-up (typ 10 kΩ). Absolute max VFLG = 7 V, IFLG = 50 mA."
},
{
"number": "4",
"name": "CTLB",
"type": "input",
"description": "Enable / control input for channel B high-side switch. Active-LOW on the AIC1519N-0 variant. Logic thresholds: VIL ≤ 0.8 V, VIH ≥ 2.4 V; input current ~0.01 µA; absolute max -0.3 V to +7 V."
},
{
"number": "5",
"name": "OUTB",
"type": "power_out",
"description": "Switched high-side power output for channel B (drain of internal PMOS). Delivers VIN through 110 mΩ (typ) RDS(ON); rated 1.4 A continuous, 1.75 A typical current-limit threshold. Requires a 33 µF (or larger) local bulk capacitor per USB spec."
},
{
"number": "6",
"name": "GND",
"type": "power_in",
"description": "Device ground reference for all logic and power circuits."
},
{
"number": "7",
"name": "IN",
"type": "power_in",
"description": "Common supply input for both channel switches and internal control circuitry. Operating range 3.1 V to 6.0 V (typ 5 V USB); UVLO threshold ~2.85 V rising / 2.65 V falling. Absolute max 7.0 V. Bypass with 0.1 µF close to the pin."
},
{
"number": "8",
"name": "OUTA",
"type": "power_out",
"description": "Switched high-side power output for channel A (drain of internal PMOS). 110 mΩ (typ) RDS(ON), 1.4 A continuous, 1.75 A typical current-limit. Requires a 33 µF (or larger) local bulk capacitor per USB spec."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/298a279639196887e272207a99381258.pdf",
"pages": 11,
"sha256": "c9ee2bd8e9061c67",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "aic1519n-0gs8tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "aic1519n-0gs8tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "54e972e12db7ac7ea1c6b7ffa4cb99546340b040d44b8e428929fef75173ce14",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "AIC Analog Integrations",
"Package": "SOP-8",
"Category": "PMIC",
"Pins": "8"
}
},
"variants": [
{
"mpn": "AIC1519N-0GS8TR",
"kind": "packaging"
},
{
"mpn": "AIC1519N-0GS8TB",
"kind": "unknown"
},
{
"mpn": "AIC1519N-0GS8TRN-1GS8TR",
"kind": "packaging"
},
{
"mpn": "AIC1519N-0GS8TRN-1GS8TB",
"kind": "packaging"
},
{
"mpn": "AIC1519N-0GS8TRD-0GS8TR",
"kind": "packaging"
},
{
"mpn": "AIC1519N-0GS8TRD-0GS8TB",
"kind": "packaging"
},
{
"mpn": "AIC1519N-0GS8TRD-1GS8TR",
"kind": "packaging"
},
{
"mpn": "AIC1519N-0GS8TRD-1GS8TB",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"aic1519n-0gs8tr"
],
"discovery_pitch": "AIC1519N-0GS8TR (AIC Analog Integrations) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"aic1519n-0gs8tr.kicad_sym",
"aic1519n-0gs8tr.kicad_mod",
"aic1519n-0gs8tr.glb",
"aic1519n-0gs8tr.step",
"aic1519n-0gs8tr.lbr",
"docs/hero.png",
"docs/aic1519n-0gs8tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T16:10:30.859Z"
}