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AFE4490RHAR

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Texas Instruments Analog Front End (AFE), VQFN-40(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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AFE4490RHAR

Texas Instruments · Analog Front End (AFE) · VQFN-40(6x6)

AFE4490RHAR from Texas Instruments, in a VQFN-40(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INN input Receiver input pin to be connected to the photodiode anode.
2 INP input Receiver input pin to be connected to the photodiode cathode.
3 RX_ANA_GND power_in Rx analog supply ground to be connected to common board ground.
4 VCM output Output common-mode voltage (0.9 V typ) to be routed through 1 kΩ series resistor and 10 nF capacitor to ground for shielding of INP and INN traces.
5 DNC unconnected Do not connect; leave this pin as open-circuit.
6 DNC unconnected Do not connect; leave this pin as open-circuit.
7 BG output Bandgap voltage reference decoupling node requiring 2.2 µF capacitor to ground with expected voltage of 1.0 V.
8 VSS power_in Substrate ground to be connected to common board ground.
9 TX_REF output Transmitter reference voltage output (0.75 V default after reset) requiring 2.2 µF decoupling capacitor to ground.
10 DNC unconnected Do not connect; leave this pin as open-circuit.
11 TX_CTRL_SUP power_in Transmit controller supply input (3.0 V to 5.25 V) requiring 0.1 µF decoupling capacitor to ground.
12 LED_DRV_GND power_in LED driver ground pin (H-bridge configuration) to be connected to common board ground.
13 LED_DRV_GND power_in LED driver ground pin (H-bridge configuration) to be connected to common board ground.
14 TXN output LED driver output B (H-bridge) with maximum output voltage not to exceed LED_DRV_SUP + 0.3 V.
15 TXP output LED driver output A (H-bridge) with maximum output voltage not to exceed LED_DRV_SUP + 0.3 V.
16 LED_DRV_GND power_in LED driver ground pin (H-bridge configuration) to be connected to common board ground.
17 LED_DRV_SUP power_in LED driver supply input (3.0 V to 5.25 V depending on LED forward voltage) capable of supplying large LED drive current.
18 LED_DRV_SUP power_in LED driver supply input (3.0 V to 5.25 V depending on LED forward voltage) capable of supplying large LED drive current.
19 RX_DIG_GND power_in Rx digital supply ground to be connected to common board ground.
20 AFE_PDN input AFE power-down control input (active low) to be connected to external microcontroller port pin.
21 DIAG_END output Diagnostics completion output that pulses high at the end of each diagnostics sequence.
22 LED_ALM output LED cable fault alarm output that indicates LED open or short condition.
23 PD_ALM/ADC_Reset output Photodiode fault alarm output that indicates PD sensor or cable fault, with optional ADC reset signal in bypass mode.
24 SCLK input SPI serial clock input for driving data shifting at frequencies up to 16 MHz.
25 SPISOMI output SPI serial output (master in, slave out) with tri-state capability for outputting register contents during read operations.
26 SPISIMO input SPI serial input (master out, slave in) for accepting register address and write data during SPI write operations.
27 SPISTE input SPI chip select input (active low) that enables serial data latching on SCLK rising edges.
28 ADC_RDY output ADC data ready output that pulses high when new ADC conversion results are available.
29 RESET input AFE reset input (active low) requiring minimum 0.5 ms low pulse after supply ramp and stabilization.
30 CLKOUT output Buffered 4-MHz clock output derived from the internal 8-MHz oscillator divided by 2.
31 RX_DIG_SUP power_in Rx digital supply input (2.0 V to 3.6 V) requiring 0.1 µF decoupling capacitor to ground.
32 RX_DIG_GND power_in Rx digital supply ground to be connected to common board ground.
33 RX_ANA_SUP power_in Rx analog supply input (2.0 V to 3.6 V) requiring 0.1 µF decoupling capacitor to ground.
34 RXOUTN output External ADC negative input that outputs filtered analog signal in ADC bypass mode with 0.9 V common mode.
35 RXOUTP output External ADC positive input that outputs filtered analog signal in ADC bypass mode with 0.9 V common mode.
36 RX_ANA_GND power_in Rx analog supply ground to be connected to common board ground.
37 XOUT passive Crystal oscillator output pin for connecting external 8-MHz crystal with appropriate load capacitor as specified by crystal vendor.
38 XIN passive Crystal oscillator input pin for connecting external 8-MHz crystal with appropriate load capacitor as specified by crystal vendor.
39 RX_ANA_SUP power_in Rx analog supply input (2.0 V to 3.6 V) requiring 0.1 µF decoupling capacitor to ground.
40 RX_ANA_GND power_in Rx analog supply ground to be connected to common board ground.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40(6x6)
Category Data Acquisition
Pins 41

CAD (KiCad official)

  • Symbol: AFE4490RHAR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: VQFN-40(6x6) (KiCad packages3D, STEP)
  • 3D model files: afe4490rhar-etched.step / afe4490rhar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); afe4490rhar.step / afe4490rhar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (98 pp, sha256 d022ff9bb44482b0, retrieved 2026-09-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF