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AFE031AIRGZT

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Texas Instruments Analog Front End (AFE), VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AFE031AIRGZT

Texas Instruments · Analog Front End (AFE) · VQFN-48-EP(7x7)

AFE031AIRGZT from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DGND power_in Digital ground connection.
2 DVDD power_in Digital supply voltage input, 3.3V nominal, maximum 5.5V.
3 SCLK input SPI serial clock input for controlling serial interface communications.
4 DIN input SPI digital input data line for serial communication.
5 DOUT output SPI digital output data line for serial communication.
6 CS input SPI chip select input, active low to enable serial communication.
7 DAC input DAC mode select input; high selects DAC register access, low selects Command/Data register access.
8 SD input System shutdown input; high place device in lowest-power mode drawing 95 μA, low enables normal operation.
9 INT output Interrupt output signaled low on current overload or thermal limit condition when enabled in Control2 Register.
10 TSENSE passive Temperature sensing diode anode internally connected to PA output stage for remote junction temperature measurement.
11 AVDD1 power_in Analog supply voltage input for low-voltage analog circuits, maximum 5.5V.
12 AGND1 power_in Analog ground connection for low-voltage analog circuits.
13 Tx_PGA_IN input Transmit path programmable gain amplifier input.
14 Tx_PGA_OUT output Transmit path programmable gain amplifier output with gain selection of 0.25, 0.5, 0.707, or 1 V/V.
15 Tx_F_IN1 input Transmit filter input 1 for differential or single-ended input configuration.
16 Tx_F_IN2 input Transmit filter input 2 for differential or single-ended input configuration.
17 Tx_F_OUT output Transmit filter output from the transmit signal path processing chain.
18 PA_IN input Power amplifier input signal connected to transmit filter output.
19 REF1 passive Power amplifier noise reducing capacitor pin for bias network stabilization.
20 Rx_PGA2_OUT output Receiver PGA2 output with programmable gain of 1, 4, 16, or 64 V/V.
21 Rx_PGA2_IN input Receiver PGA2 input from receiver filter output.
22 Rx_F_OUT output Receiver filter output from programmable bandpass filter processing.
23 Rx_C2 passive Receiver external frequency select capacitor connection for tuning receiver filter center frequency.
24 Rx_C1 passive Receiver external frequency select capacitor connection for tuning receiver filter center frequency.
25 Rx_F_IN input Receiver filter input from receiver PGA1 output.
26 Rx_PGA1_OUT output Receiver PGA1 output with programmable gain of 0.25, 0.5, 1, or 2 V/V.
27 Rx_PGA1_IN input Receiver PGA1 input with voltage limit of ±10V and input range AGND minus 0.4V to AVDD plus 0.4V.
28 REF2 passive Receiver noise reducing capacitor pin for bias network stabilization of receiver and two-wire blocks.
29 AGND2 power_in Analog ground connection for low-voltage analog circuits.
30 AVDD2 power_in Analog supply voltage input for low-voltage analog circuits, maximum 5.5V.
31 E_Rx_OUT output Two-wire receiver output for low-speed communication channel.
32 E_Rx_IN input Two-wire receiver input for low-speed communication channel reception.
33 E_Tx_OUT output Two-wire transmitter output for low-speed communication channel transmission.
34 E_Tx_IN input Two-wire transmitter input data for low-speed communication transmission.
35 E_Tx_CLK input Two-wire transmitter clock input for synchronizing low-speed communication transmission.
36 ZC_OUT2 output Zero crossing detector output 2 from second independent zero-crossing detection circuit.
37 ZC_OUT1 output Zero crossing detector output 1 from first independent zero-crossing detection circuit.
38 ZC_IN2 input Zero crossing detector input 2 for detection of AC mains zero-crossing point.
39 ZC_IN1 input Zero crossing detector input 1 for detection of AC mains zero-crossing point.
40 PA_GND2 power_in Power amplifier ground connection for high-current output return path.
41 PA_GND1 power_in Power amplifier ground connection for high-current output return path.
42 PA_OUT2 output Power amplifier output 2 capable of delivering maximum 1.5A current into low-impedance load.
43 PA_OUT1 output Power amplifier output 1 capable of delivering maximum 1.5A current into low-impedance load.
44 PA_VS2 power_in Power amplifier supply voltage input; operating range 7V to 24V, maximum 26V, for high-current output stage.
45 PA_VS1 power_in Power amplifier supply voltage input; operating range 7V to 24V, maximum 26V, for high-current output stage.
46 PA_ISET passive Power amplifier output current limit set resistor connection for programming maximum output current limit.
47 Tx_FLAG tri_state Open-drain transmitter ready flag output; high indicates transmit signal path enabled and ready for transmission.
48 Rx_FLAG tri_state Open-drain receiver ready flag output; high indicates receiver signal path enabled and ready for reception.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(7x7)
Category Data Acquisition
Pins 49

CAD (KiCad official)

  • Symbol: AFE031AIRGZT
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: afe031airgzt-etched.step / afe031airgzt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); afe031airgzt.step / afe031airgzt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (62 pp, sha256 2abe82e0370704d0, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF