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ADUM7642CRQZ

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Analog Devices Digital Isolators, QSOP-20-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentcommunication interface chip-uart-485-232adum7642crqzfactory-2.0.0extractor-text

Verified ADUM7642CRQZ

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADUM7642CRQZ · QSOP-20-150mil · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 22-page datasheet
  • ✓distributor: lcsc C579432, digikey ADUM7642CRQZ-ND, mouser 584-ADUM7642CRQZ
  • ✓family: QSOP-20_3.9x8.7mm_P0.635mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-5hg4c4pt/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adum7642crqz.kicad_sym✓ adum7642crqz.kicad_mod✓ adum7642crqz.step
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Contents

README

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ADUM7642CRQZ

Analog Devices · Digital Isolators · QSOP-20-150mil

ADUM7642CRQZ from Analog Devices, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1A power_in Supply Voltage A for Isolator Side 1, 3.0 V to 5.5 V; must be connected externally to Pin 7, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD1A and GND1 (Pin 2).
2 GND1 power_in Ground reference for Isolator Side 1; internally connected to Pin 10, and connecting both pins to the PCB ground plane is recommended.
3 VIA input Logic Input A; the datasheet gives no further electrical limits for this pin.
4 VIB input Logic Input B; the datasheet gives no further electrical limits for this pin.
5 VIC input Logic Input C; the datasheet gives no further electrical limits for this pin.
6 VOD output Logic Output D; the datasheet gives no further electrical limits for this pin.
7 VDD1B power_in Supply Voltage B for Isolator Side 1, 3.0 V to 5.5 V; must be connected externally to Pin 1, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD1B and GND1 (Pin 10).
8 VOE output Logic Output E; the datasheet gives no further electrical limits for this pin.
9 VIF input Logic Input F; the datasheet gives no further electrical limits for this pin.
10 GND1 power_in Ground reference for Isolator Side 1; internally connected to Pin 2, and connecting both pins to the PCB ground plane is recommended.
11 GND2 power_in Ground reference for Isolator Side 2; internally connected to Pin 19, and connecting both pins to the PCB ground plane is recommended.
12 VOF output Logic Output F; the datasheet gives no further electrical limits for this pin.
13 VIE input Logic Input E; the datasheet gives no further electrical limits for this pin.
14 VDD2B power_in Supply Voltage B for Isolator Side 2, 3.0 V to 5.5 V; must be connected externally to Pin 20, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD2B and GND2 (Pin 11).
15 VID input Logic Input D; the datasheet gives no further electrical limits for this pin.
16 VOC output Logic Output C; the datasheet gives no further electrical limits for this pin.
17 VOB output Logic Output B; the datasheet gives no further electrical limits for this pin.
18 VOA output Logic Output A; the datasheet gives no further electrical limits for this pin.
19 GND2 power_in Ground reference for Isolator Side 2; internally connected to Pin 11, and connecting both pins to the PCB ground plane is recommended.
20 VDD2A power_in Supply Voltage A for Isolator Side 2, 3.0 V to 5.5 V; must be connected externally to Pin 14, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD2A and GND2 (Pin 19).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package QSOP-20-150mil
Category Communication Interface Chip/UART/485/232
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature TA -40 105 °C 10
Supply Voltages (recommended) VDD1, VDD2 3 5.5 V 10
Input Signal Rise and Fall Times 1 ms 10
Storage Temperature Range TST -65 150 °C 11
Supply Voltages (absolute maximum) VDD1, VDD2 -0.5 7 V 11
Average Output Current per Pin, Side 1 IO1 -10 10 mA 11
Average Output Current per Pin, Side 2 IO2 -10 10 mA 11
IC Junction-to-Ambient Thermal Resistance θJA 76 °C/W Thermocouple located at center of package underside 9
Pulse Width (5 V operation) PW 40 ns Within PWD limit 4
Data Rate (5 V operation) 25 Mbps Within PWD limit 4
Pulse Width Distortion (5 V operation) PWD 2 6 ns /tPLH − tPHL/ 4
Propagation Delay Skew (5 V operation) tPSK 14 ns 4
Channel Matching Codirectional (5 V operation) tPSKCD 6 12 ns 4
Channel Matching Opposing Directional (5 V operation) tPSKOD 7 12 ns 4
Supply Current IDD1, 1 Mbps (ADuM7642, 5 V operation) IDD1 5.2 6.3 mA No load 4
Supply Current IDD2, 1 Mbps (ADuM7642, 5 V operation) IDD2 4.8 6 mA No load 4
Supply Current IDD1, 25 Mbps (ADuM7642, 5 V operation) IDD1 31 38 mA No load 4
Supply Current IDD2, 25 Mbps (ADuM7642, 5 V operation) IDD2 19 24 mA No load 4
Output Low Voltage (5 V operation, 20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 4
Output Low Voltage (5 V operation, 4 mA) VOL 0.2 0.4 V IOx = 4 mA, VIx = VIxL 4
Input Current per Channel (5 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 5
Quiescent Supply Current Input (5 V operation) IDDI (Q) 0.95 1.16 mA 5
Quiescent Supply Current Output (5 V operation) IDDO (Q) 0.73 0.98 mA 5
Common-Mode Transient Immunity (5 V operation) /CM/ 15 25 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 5
Pulse Width Distortion (3.3 V operation) PWD 2 6 ns /tPLH − tPHL/ 5
Propagation Delay Skew (3.3 V operation) tPSK 14 ns 5
Channel Matching Codirectional (3.3 V operation) tPSKCD 6 12 ns 5
Channel Matching Opposing Directional (3.3 V operation) tPSKOD 6 15 ns 5
Supply Current IDD1, 1 Mbps (ADuM7642, 3.3 V operation) IDD1 3.7 4.7 mA No load 6
Supply Current IDD2, 1 Mbps (ADuM7642, 3.3 V operation) IDD2 3.5 4.4 mA No load 6
Supply Current IDD1, 25 Mbps (ADuM7642, 3.3 V operation) IDD1 23 27 mA No load 6
Supply Current IDD2, 25 Mbps (ADuM7642, 3.3 V operation) IDD2 14 16 mA No load 6
Output Low Voltage (3.3 V operation, 20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 6
Output Low Voltage (3.3 V operation, 4 mA) VOL 0.2 0.4 V IOx = 4 mA, VIx = VIxL 6
Input Current per Channel (3.3 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 6
Quiescent Supply Current Input (3.3 V operation) IDDI (Q) 0.68 0.87 mA 6
Quiescent Supply Current Output (3.3 V operation) IDDO (Q) 0.55 0.72 mA 6
Common-Mode Transient Immunity (3.3 V operation) /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 6
Pulse Width Distortion (mixed 5 V/3.3 V operation) PWD 2 6 ns /tPLH − tPHL/ 7
Propagation Delay Skew (mixed 5 V/3.3 V operation) tPSK 14 ns 7
Channel Matching Codirectional (mixed 5 V/3.3 V operation) tPSKCD 5 15 ns 7
Channel Matching Opposing Directional (mixed 5 V/3.3 V operation) tPSKOD 8 15 ns 7
Supply Current IDD1, 1 Mbps (ADuM7642, mixed 5 V/3.3 V operation) IDD1 5.1 6.3 mA No load 7
Supply Current IDD2, 1 Mbps (ADuM7642, mixed 5 V/3.3 V operation) IDD2 3.5 4.3 mA No load 7
Supply Current IDD1, 25 Mbps (ADuM7642, mixed 5 V/3.3 V operation) IDD1 31 38 mA No load 7
Supply Current IDD2, 25 Mbps (ADuM7642, mixed 5 V/3.3 V operation) IDD2 14 16 mA No load 7
Output Low Voltage (mixed 5 V/3.3 V operation, 20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 7
Input Current per Channel (mixed 5 V/3.3 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 7
Common-Mode Transient Immunity (mixed 5 V/3.3 V operation) /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 7
Pulse Width Distortion (mixed 3.3 V/5 V operation) PWD 2 6 ns /tPLH − tPHL/ 8
Propagation Delay Skew (mixed 3.3 V/5 V operation) tPSK 14 ns 8
Channel Matching Codirectional (mixed 3.3 V/5 V operation) tPSKCD 6 13 ns 8
Channel Matching Opposing Directional (mixed 3.3 V/5 V operation) tPSKOD 9 18 ns 8
Supply Current IDD1, 1 Mbps (ADuM7642, mixed 3.3 V/5 V operation) IDD1 3.7 4.4 mA No load 8
Supply Current IDD2, 1 Mbps (ADuM7642, mixed 3.3 V/5 V operation) IDD2 4.8 6 mA No load 8
Supply Current IDD1, 25 Mbps (ADuM7642, mixed 3.3 V/5 V operation) IDD1 23 27 mA No load 8
Supply Current IDD2, 25 Mbps (ADuM7642, mixed 3.3 V/5 V operation) IDD2 19 24 mA No load 8
Output Low Voltage (mixed 3.3 V/5 V operation, 20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 8
Input Current per Channel (mixed 3.3 V/5 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 9
Common-Mode Transient Immunity (mixed 3.3 V/5 V operation) /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs 3 Refers to common-mode transients across the insulation barrier. Common￾mode transients exceeding the absolute maximum ratings may cause latch-up 11

CAD (KiCad official)

  • Symbol: ADUM7642CRQZ
  • Footprint: Package_SO:QSOP-20_3.9x8.7mm_P0.635mm
  • 3D model: QSOP-20-150mil (KiCad packages3D, STEP)
  • 3D model files: adum7642crqz-etched.step / adum7642crqz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum7642crqz.step / adum7642crqz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 d5f48833ac0414f1, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF