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ADUM7640CRQZ

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Analog Devices Digital Isolators, QSOP-20-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Verified ADUM7640CRQZ

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADUM7640CRQZ · QSOP-20-150mil · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 22-page datasheet
  • ✓distributor: lcsc C209395, digikey ADUM7640CRQZ-ND, mouser 584-ADUM7640CRQZ
  • ✓family: QSOP-20_3.9x8.7mm_P0.635mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-rjhbao3w/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adum7640crqz.kicad_sym✓ adum7640crqz.kicad_mod✓ adum7640crqz.step
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Contents

README

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ADUM7640CRQZ

Analog Devices · Digital Isolators · QSOP-20-150mil

ADUM7640CRQZ from Analog Devices, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1A power_in Supply voltage A for isolator side 1, 3.0 V to 5.5 V; must be connected externally to pin 7, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD1A and GND1 (pin 2).
2 GND1 power_in Ground reference for isolator side 1; internally connected to pin 10, and both pins should be connected to the PCB ground plane.
3 VIA input Logic input A on isolator side 1; the datasheet pin table states no further electrical limits for this pin.
4 VIB input Logic input B on isolator side 1; the datasheet pin table states no further electrical limits for this pin.
5 VIC input Logic input C on isolator side 1; the datasheet pin table states no further electrical limits for this pin.
6 VID input Logic input D on isolator side 1; the datasheet pin table states no further electrical limits for this pin.
7 VDD1B power_in Supply voltage B for isolator side 1, 3.0 V to 5.5 V; must be connected externally to pin 1, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD1B and GND1 (pin 10).
8 VIE input Logic input E on isolator side 1; the datasheet pin table states no further electrical limits for this pin.
9 VIF input Logic input F on isolator side 1; the datasheet pin table states no further electrical limits for this pin.
10 GND1 power_in Ground reference for isolator side 1; internally connected to pin 2, and both pins should be connected to the PCB ground plane.
11 GND2 power_in Ground reference for isolator side 2; internally connected to pin 19, and both pins should be connected to the PCB ground plane.
12 VOF output Logic output F on isolator side 2; the output is held in the default high state when the input side is unpowered.
13 VOE output Logic output E on isolator side 2; the output is held in the default high state when the input side is unpowered.
14 VDD2B power_in Supply voltage B for isolator side 2, 3.0 V to 5.5 V; must be connected externally to pin 20, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD2B and GND2 (pin 11).
15 VOD output Logic output D on isolator side 2; the output is held in the default high state when the input side is unpowered.
16 VOC output Logic output C on isolator side 2; the output is held in the default high state when the input side is unpowered.
17 VOB output Logic output B on isolator side 2; the output is held in the default high state when the input side is unpowered.
18 VOA output Logic output A on isolator side 2; the output is held in the default high state when the input side is unpowered.
19 GND2 power_in Ground reference for isolator side 2; internally connected to pin 11, and both pins should be connected to the PCB ground plane.
20 VDD2A power_in Supply voltage A for isolator side 2, 3.0 V to 5.5 V; must be connected externally to pin 14, with a 0.01 µF to 0.1 µF decoupling capacitor between VDD2A and GND2 (pin 19).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package QSOP-20-150mil
Category Interface ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating temperature TA -40 105 °C 10
Supply voltages VDD1, VDD2 VDD1, VDD2 3 5.5 V 10
Input signal rise and fall times 1 ms 10
Storage temperature range TST -65 150 °C 11
Ambient operating temperature TA -40 105 °C 11
Supply voltages (VDD1, VDD2) VDD1, VDD2 -0.5 7 V 11
Input voltages, maximum VDDI + 0.5 V VIA, VIB, VIC, VID, VIE, VIF -0.5 V 11
Output voltages, maximum VDDO + 0.5 V VOA, VOB, VOC, VOD, VIE, VIF -0.5 V 11
Average output current per pin, Side 1 IO1 -10 10 mA 11
Average output current per pin, Side 2 IO2 -10 10 mA 11
Common-mode transients -100 100 kV/µs 11
Pulse width, 5 V operation PW 40 ns Within PWD limit 4
Data rate, 5 V operation 25 Mbps Within PWD limit 4
Pulse width distortion, 5 V operation PWD 2 6 ns /tPLH − tPHL/ 4
Pulse width, 3.3 V operation PW 40 ns Within PWD limit 5
Data rate, 3.3 V operation 25 Mbps Within PWD limit 5
Pulse width distortion, 3.3 V operation PWD 2 6 ns /tPLH − tPHL/ 5
Pulse width, mixed 5 V/3.3 V operation PW 40 ns Within PWD limit 6
Data rate, mixed 5 V/3.3 V operation 25 Mbps Within PWD limit 6
Pulse width distortion, mixed 5 V/3.3 V operation PWD 2 6 ns /tPLH − tPHL/ 7
Pulse width, mixed 3.3 V/5 V operation PW 40 ns Within PWD limit 8
Data rate, mixed 3.3 V/5 V operation 25 Mbps Within PWD limit 8
Pulse width distortion, mixed 3.3 V/5 V operation PWD 2 6 ns /tPLH − tPHL/ 8
Supply current IDD1, 1 Mbps, 5 V operation (ADuM7640) IDD1 5.7 7 mA No load 4
Supply current IDD2, 1 Mbps, 5 V operation (ADuM7640) IDD2 4.4 5.9 mA No load 4
Supply current IDD1, 25 Mbps, 5 V operation (ADuM7640) IDD1 44 54 mA No load 4
Supply current IDD2, 25 Mbps, 5 V operation (ADuM7640) IDD2 11 13 mA No load 4
Supply current IDD1, 1 Mbps, 3.3 V operation (ADuM7640) IDD1 4.1 5.2 mA No load 5
Supply current IDD2, 1 Mbps, 3.3 V operation (ADuM7640) IDD2 3.3 4.3 mA No load 5
Supply current IDD1, 25 Mbps, 3.3 V operation (ADuM7640) IDD1 32 38 mA No load 5
Supply current IDD2, 25 Mbps, 3.3 V operation (ADuM7640) IDD2 7.2 8.7 mA No load 5
Supply current IDD1, 1 Mbps, mixed 5 V/3.3 V operation (ADuM7640) IDD1 5.7 7 mA No load 7
Supply current IDD2, 1 Mbps, mixed 5 V/3.3 V operation (ADuM7640) IDD2 3.3 4.1 mA No load 7
Supply current IDD1, 25 Mbps, mixed 5 V/3.3 V operation (ADuM7640) IDD1 44 54 mA No load 7
Supply current IDD2, 25 Mbps, mixed 5 V/3.3 V operation (ADuM7640) IDD2 7.5 8.7 mA No load 7
Supply current IDD1, 1 Mbps, mixed 3.3 V/5 V operation (ADuM7640) IDD1 4.1 4.9 mA No load 8
Supply current IDD2, 1 Mbps, mixed 3.3 V/5 V operation (ADuM7640) IDD2 4.5 5.9 mA No load 8
Supply current IDD1, 25 Mbps, mixed 3.3 V/5 V operation (ADuM7640) IDD1 32 38 mA No load 8
Supply current IDD2, 25 Mbps, mixed 3.3 V/5 V operation (ADuM7640) IDD2 11 13 mA No load 8
Quiescent supply current, input, 5 V operation IDDI (Q) 0.95 1.16 mA 5
Quiescent supply current, output, 5 V operation IDDO (Q) 0.73 0.98 mA 5
Quiescent supply current, input, 3.3 V operation IDDI (Q) 0.68 0.87 mA 6
Quiescent supply current, output, 3.3 V operation IDDO (Q) 0.55 0.72 mA 6
Input current per channel, 5 V operation II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 5
Input current per channel, 3.3 V operation II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 6
Input current per channel, mixed 5 V/3.3 V operation II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 7
Input current per channel, mixed 3.3 V/5 V operation II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 9
Common-mode transient immunity, 5 V operation /CM/ 15 25 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 5
Common-mode transient immunity, 3.3 V operation /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 6
Common-mode transient immunity, mixed 5 V/3.3 V operation /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 7
Common-mode transient immunity, mixed 3.3 V/5 V operation /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 9
IC junction-to-ambient thermal resistance θJA 76 °C/W Thermocouple located at center of package underside 9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs 3 Refers to common-mode transients across the insulation barrier. Common￾mode transients exceeding the absolute maximum ratings may cause latch-up 11

CAD (KiCad official)

  • Symbol: ADUM7640CRQZ
  • Footprint: Package_SO:QSOP-20_3.9x8.7mm_P0.635mm
  • 3D model: QSOP-20-150mil (KiCad packages3D, STEP)
  • 3D model files: adum7640crqz-etched.step / adum7640crqz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum7640crqz.step / adum7640crqz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 d5f48833ac0414f1, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF