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ADUM7442ARQZ
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Analog Devices Digital Isolators, QSOP-16-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ADUM7442ARQZ
Analog Devices · Digital Isolators · QSOP-16-150mil
ADUM7442ARQZ from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1A | power_in | Supply voltage A for isolator side 1, 3.0 V to 5.5 V; pin 1 must be connected externally to pin 7, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD1A and GND1 (pin 2). |
| 2 | GND1 | power_in | Ground reference for isolator side 1; pins 2 and 8 are internally connected and connecting both to GND1 is recommended. |
| 3 | VIA | input | Logic input A for the side 1 input channel; the pin function table states no further electrical limits. |
| 4 | VIB | input | Logic input B for the side 1 input channel; the pin function table states no further electrical limits. |
| 5 | VOC | output | Logic output C; per the truth table, the output is in the default high state when its input side is unpowered. |
| 6 | VOD | output | Logic output D; per the truth table, the output is in the default high state when its input side is unpowered. |
| 7 | VDD1B | power_in | Supply voltage B for isolator side 1, 3.0 V to 5.5 V; pin 7 must be connected externally to pin 1, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD1B and GND1 (pin 8). |
| 8 | GND1 | power_in | Ground reference for isolator side 1; pins 2 and 8 are internally connected and connecting both to GND1 is recommended. |
| 9 | GND2 | power_in | Ground reference for isolator side 2; pins 9 and 15 are internally connected and connecting both to GND2 is recommended. |
| 10 | VDD2B | power_in | Supply voltage B for isolator side 2, 3.0 V to 5.5 V; pin 10 must be connected externally to pin 16, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD2B and GND2 (pin 9). |
| 11 | VID | input | Logic input D for the side 2 input channel; the pin function table states no further electrical limits. |
| 12 | VIC | input | Logic input C for the side 2 input channel; the pin function table states no further electrical limits. |
| 13 | VOB | output | Logic output B; per the truth table, the output is in the default high state when its input side is unpowered. |
| 14 | VOA | output | Logic output A; per the truth table, the output is in the default high state when its input side is unpowered. |
| 15 | GND2 | power_in | Ground reference for isolator side 2; pins 9 and 15 are internally connected and connecting both to GND2 is recommended. |
| 16 | VDD2A | power_in | Supply voltage A for isolator side 2, 3.0 V to 5.5 V; pin 16 must be connected externally to pin 10, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD2A and GND2 (pin 15). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QSOP-16-150mil |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic High Input Threshold | VIH | 0.7 | VDDx | 4 | |||
| Logic Low Input Threshold | VIL | 0.3 | VDDx | 4 | |||
| Logic High Output Voltage | VOH | 5 | V | IOx = −20 µA, VIx = VIxH | 4 | ||
| Logic High Output Voltage | VOH | 4.8 | V | IOx = −4 mA, VIx = VIxH | 4 | ||
| Logic Low Output Voltage | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 4 | |
| Logic Low Output Voltage | VOL | 0.2 | 0.4 | V | IOx = 4 mA, VIx = VIxL | 4 | |
| Input Current per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 4 |
| Quiescent Input Supply Current | IDDI(Q) | 0.76 | 0.95 | mA | 4 | ||
| Quiescent Output Supply Current | IDDO(Q) | 0.57 | 0.73 | mA | 4 | ||
| Dynamic Input Supply Current | IDDI(D) | 0.26 | mA/Mbps | 4 | |||
| Dynamic Output Supply Current | IDDO(D) | 0.05 | mA/Mbps | 4 | |||
| ADuM7442 Input Supply Current IDD1 (5 V, 1 Mbps) | IDD1 | 3.2 | 4 | mA | 1 Mbps, A grade | 4 | |
| ADuM7442 Output Supply Current IDD2 (5 V, 1 Mbps) | IDD2 | 3.2 | 4 | mA | 1 Mbps, A grade | 4 | |
| Propagation Delay | tPHL, tPLH | 50 | 75 | ns | 50% input to 50% output, A grade | 4 | |
| Pulse Width Distortion | PWD | 10 | 25 | ns | /tPLH − tPHL/, A grade | 4 | |
| Pulse Width | PW | 250 | ns | Within PWD limit, A grade | 4 | ||
| Propagation Delay Skew | tPSK | 20 | ns | A grade | 4 | ||
| Channel Matching Codirectional | tPSKCD | 25 | ns | A grade | 4 | ||
| Channel Matching Opposing-Direction | tPSKOD | 30 | ns | A grade | 4 | ||
| Jitter | 2 | ns | A grade | 4 | |||
| Output Rise/Fall Time | tR/tF | 2 | ns | 10% to 90% | 5 | ||
| Common-Mode Transient Immunity | /CM/ | 15 | 25 | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 5 | |
| Refresh Rate | fr | 1.2 | Mbps | 5 | |||
| Recommended Operating Temperature | TA | -40 | 105 | °C | 9 | ||
| Recommended Supply Voltage | VDD1, VDD2 | 3 | 5.5 | V | Relative to respective ground | 9 | |
| Input Signal Rise and Fall Times | 1 | ms | 9 | ||||
| Storage Temperature Range | TST | -65 | 150 | °C | 10 | ||
| Ambient Operating Temperature Range | TA | -40 | 105 | °C | 10 | ||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | 10 | ||
| Average Output Current per Pin Side 1 | IO1 | -10 | 10 | mA | 10 | ||
| Average Output Current per Pin Side 2 | IO2 | -10 | 10 | mA | 10 | ||
| Common-Mode Transients | -100 | 100 | kV/µs | Across the insulation barrier | 10 | ||
| IC Junction-to-Ambient Thermal Resistance | θJA | 76 | °C/W | Thermocouple located at center of package underside | 8 | ||
| Capacitance (Input-to-Output) | CI-O | 2 | pF | f = 1 MHz | 8 | ||
| Input Capacitance | CI | 4 | pF | From any input data pin to ground | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs | 3 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up | 10 |
CAD (KiCad official)
- Symbol:
ADUM7442ARQZ - Footprint:
Package_SO:QSOP-16_3.9x4.9mm_P0.635mm - 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files:
adum7442arqz-etched.step/adum7442arqz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum7442arqz.step/adum7442arqz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
1941e7b1b019a8b5, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).