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ADUM7440CRQZ

Analog Devices · Digital Isolators · QSOP-16-150mil

ADUM7440CRQZ from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1A power_in Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V) that must be connected externally to Pin 7, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD1A and GND1 (Pin 2).
2 GND1 power_in Ground 1 is the ground reference for Isolator Side 1, and Pin 2 and Pin 8 are internally connected, so connecting both to GND1 is recommended.
3 VIA input Logic Input A for channel A on the Side 1 input; the datasheet gives no further electrical limits for this pin in the pin function table.
4 VIB input Logic Input B for channel B on the Side 1 input; the datasheet gives no further electrical limits for this pin in the pin function table.
5 VIC input Logic Input C for channel C on the Side 1 input; the datasheet gives no further electrical limits for this pin in the pin function table.
6 VID input Logic Input D for channel D on the Side 1 input; the datasheet gives no further electrical limits for this pin in the pin function table.
7 VDD1B power_in Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V) that must be connected externally to Pin 1, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD1B and GND1 (Pin 8).
8 GND1 power_in Ground 1 is the ground reference for Isolator Side 1, and Pin 2 and Pin 8 are internally connected, so connecting both to GND1 is recommended.
9 GND2 power_in Ground 2 is the ground reference for Isolator Side 2, and Pin 9 and Pin 15 are internally connected, so connecting both to GND2 is recommended.
10 VDD2B power_in Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V) that must be connected externally to Pin 16, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD2B and GND2 (Pin 9).
11 VOD output Logic Output D on the Side 2 output; it is high-impedance when VDDO is unpowered and defaults high when the input side is unpowered.
12 VOC output Logic Output C on the Side 2 output; it is high-impedance when VDDO is unpowered and defaults high when the input side is unpowered.
13 VOB output Logic Output B on the Side 2 output; it is high-impedance when VDDO is unpowered and defaults high when the input side is unpowered.
14 VOA output Logic Output A on the Side 2 output; it is high-impedance when VDDO is unpowered and defaults high when the input side is unpowered.
15 GND2 power_in Ground 2 is the ground reference for Isolator Side 2, and Pin 9 and Pin 15 are internally connected, so connecting both to GND2 is recommended.
16 VDD2A power_in Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V) that must be connected externally to Pin 10, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD2A and GND2 (Pin 15).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package QSOP-16-150mil
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Propagation Delay (5 V, C grade) tPHL, tPLH 29 40 50 ns 50% input to 50% output 4
Pulse Width Distortion (5 V, C grade) PWD 2 5 ns /tPLH − tPHL/ 4
Pulse Width (C grade) PW 40 ns Within PWD limit 4
Propagation Delay Skew (5 V) tPSK 10 ns 4
Channel Matching Codirectional (5 V, C grade) tPSKCD 2 4 ns 4
Channel Matching Opposing-Direction (5 V, C grade) tPSKOD 3 6 ns 4
Propagation Delay (3.3 V, C grade) tPHL, tPLH 37 51 66 ns 50% input to 50% output 5
Pulse Width Distortion (3.3 V, C grade) PWD 2 5 ns /tPLH − tPHL/ 5
Pulse Width (3.3 V, C grade) PW 40 ns Within PWD limit 5
Propagation Delay Skew (3.3 V) tPSK 10 ns 5
Channel Matching Codirectional (3.3 V, C grade) tPSKCD 3 5 ns 5
Channel Matching Opposing-Direction (3.3 V, C grade) tPSKOD 4 7 ns 5
Propagation Delay (5 V in / 3.3 V out, C grade) tPHL, tPLH 30 42 55 ns 50% input to 50% output 6
Pulse Width Distortion (mixed 5/3.3 V, C grade) PWD 2 5 ns /tPLH − tPHL/ 6
Pulse Width (mixed 5/3.3 V, C grade) PW 40 ns Within PWD limit 6
Propagation Delay Skew (mixed 5/3.3 V) tPSK 10 ns 6
Channel Matching Codirectional (mixed 5/3.3 V, C grade) tPSKCD 2 5 ns 6
Channel Matching Opposing-Direction (mixed 5/3.3 V, C grade) tPSKOD 3 6 ns 6
Propagation Delay (3.3 V in / 5 V out, C grade) tPHL, tPLH 31 46 60 ns 50% input to 50% output 7
Pulse Width Distortion (mixed 3.3/5 V, C grade) PWD 2 5 ns /tPLH − tPHL/ 7
Pulse Width (mixed 3.3/5 V, C grade) PW 40 ns Within PWD limit 7
Propagation Delay Skew (mixed 3.3/5 V) tPSK 10 ns 7
Channel Matching Codirectional (mixed 3.3/5 V, C grade) tPSKCD 2 5 ns 7
Channel Matching Opposing-Direction (mixed 3.3/5 V, C grade) tPSKOD 3 7 ns 7
Supply Current IDD1 (ADuM7440, 5 V, 25 Mbps) IDD1 28 35 mA 25 Mbps, C Grade column 4
Supply Current IDD2 (ADuM7440, 5 V, 25 Mbps) IDD2 6 11 mA 25 Mbps, C Grade column 4
Supply Current IDD1 (ADuM7440, 3.3 V, 1 Mbps) IDD1 3 3.8 mA 1 Mbps, A, C Grades column 5
Supply Current IDD1 (ADuM7440, 3.3 V, 25 Mbps) IDD1 20 28 mA 25 Mbps, C Grade column 5
Supply Current IDD2 (ADuM7440, 3.3 V, 1 Mbps) IDD2 1.8 2.3 mA 1 Mbps, A, C Grades column 5
Supply Current IDD2 (ADuM7440, 3.3 V, 25 Mbps) IDD2 4 5 mA 25 Mbps, C Grade column 5
Supply Current IDD1 (ADuM7440, mixed 5/3.3 V, 1 Mbps) IDD1 4.4 5.5 mA 1 Mbps, A, C Grades column 6
Supply Current IDD1 (ADuM7440, mixed 5/3.3 V, 25 Mbps) IDD1 28 35 mA 25 Mbps, C Grade column 6
Supply Current IDD2 (ADuM7440, mixed 5/3.3 V, 1 Mbps) IDD2 1.6 2.1 mA 1 Mbps, A, C Grades column 6
Supply Current IDD2 (ADuM7440, mixed 5/3.3 V, 25 Mbps) IDD2 3.5 4.5 mA 25 Mbps, C Grade column 6
Supply Current IDD1 (ADuM7440, mixed 3.3/5 V, 1 Mbps) IDD1 2.7 3.3 mA 1 Mbps, A, C Grades column 8
Supply Current IDD1 (ADuM7440, mixed 3.3/5 V, 25 Mbps) IDD1 18 24 mA 25 Mbps, C Grade column 8
Supply Current IDD2 (ADuM7440, mixed 3.3/5 V, 1 Mbps) IDD2 2.5 3.3 mA 1 Mbps, A, C Grades column 8
Supply Current IDD2 (ADuM7440, mixed 3.3/5 V, 25 Mbps) IDD2 5.7 8 mA 25 Mbps, C Grade column 8
Logic Low Output Voltage (20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 4
Logic Low Output Voltage (4 mA) VOL 0.2 0.4 V IOx = 4 mA, VIx = VIxL 4
Input Current per Channel II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 4
Quiescent Input Supply Current (5 V) IDDI(Q) 0.76 0.95 mA 4
Quiescent Output Supply Current (5 V) IDDO(Q) 0.57 0.73 mA 4
Common-Mode Transient Immunity (5 V) /CM/ 15 25 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 5
Common-Mode Transient Immunity (3.3 V) /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 6
Quiescent Input Supply Current (mixed 3.3/5 V) IDDI(Q) 0.5 0.6 mA 8
Quiescent Output Supply Current (mixed 3.3/5 V) IDDO(Q) 0.61 0.73 mA 8
Common-Mode Transient Immunity (mixed 3.3/5 V) /CM/ 15 20 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 8
Operating Temperature TA -40 105 °C 9
Supply Voltages VDD1, VDD2 3 5.5 V 9
Input Signal Rise and Fall Times 1 ms 9
Storage Temperature TST -65 150 °C 10
Ambient Operating Temperature TA -40 105 °C 10
Supply Voltages VDD1, VDD2 -0.5 7 V 10
Input Voltages VIA, VIB, VIC, VID -0.5 V 10
Output Voltages VOA, VOB, VOC, VOD -0.5 V 10
Average Output Current per Pin, Side 1 IO1 -10 10 mA 10
Average Output Current per Pin, Side 2 IO2 -10 10 mA 10
Common-Mode Transients -100 100 kV/µs 10
IC Junction-to-Ambient Thermal Resistance θJA 76 °C/W Thermocouple located at center of package underside 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs 3 Refers to common-mode transients across the insulation barrier. Common￾mode transients exceeding the absolute maximum ratings may cause latch-up 10

CAD (KiCad official)

  • Symbol: ADUM7440CRQZ
  • Footprint: Package_SO:QSOP-16_3.9x4.9mm_P0.635mm
  • 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
  • 3D model files: adum7440crqz-etched.step / adum7440crqz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum7440crqz.step / adum7440crqz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 1941e7b1b019a8b5, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF