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ADUM7440CRQZ-RL7
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Analog Devices Digital Isolators, QSOP-16-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADUM7440CRQZ-RL7
Analog Devices · Digital Isolators · QSOP-16-150mil
ADUM7440CRQZ-RL7 from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1A | power_in | Side 1 supply voltage A, 3.0 V to 5.5 V; pin 1 must be externally connected to pin 7, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD1A (pin 1) and GND1 (pin 2). |
| 2 | GND1 | power_in | Side 1 ground reference; pin 2 is internally connected to pin 8, and connecting both to GND1 is recommended. |
| 3 | VIA | input | Logic input A on the side 1 input channel. |
| 4 | VIB | input | Logic input B on the side 1 input channel. |
| 5 | VIC | input | Logic input C on the side 1 input channel. |
| 6 | VID | input | Logic input D on the side 1 input channel. |
| 7 | VDD1B | power_in | Side 1 supply voltage B, 3.0 V to 5.5 V; pin 7 must be externally connected to pin 1, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD1B (pin 7) and GND1 (pin 8). |
| 8 | GND1 | power_in | Side 1 ground reference; pin 8 is internally connected to pin 2, and connecting both to GND1 is recommended. |
| 9 | GND2 | power_in | Side 2 ground reference; pin 9 is internally connected to pin 15, and connecting both to GND2 is recommended. |
| 10 | VDD2B | power_in | Side 2 supply voltage B, 3.0 V to 5.5 V; pin 10 must be externally connected to pin 16, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD2B (pin 10) and GND2 (pin 9). |
| 11 | VOD | output | Logic output D on the side 2 output channel. |
| 12 | VOC | output | Logic output C on the side 2 output channel. |
| 13 | VOB | output | Logic output B on the side 2 output channel. |
| 14 | VOA | output | Logic output A on the side 2 output channel. |
| 15 | GND2 | power_in | Side 2 ground reference; pin 15 is internally connected to pin 9, and connecting both to GND2 is recommended. |
| 16 | VDD2A | power_in | Side 2 supply voltage A, 3.0 V to 5.5 V; pin 16 must be externally connected to pin 10, with a 0.01 µF to 0.1 µF ceramic bypass capacitor between VDD2A (pin 16) and GND2 (pin 15). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QSOP-16-150mil |
| Category | Signal Isolation Devices |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum data rate (grade C) | 25 | Mbps | 3 | ||||
| Propagation delay tPHL, tPLH (5 V supplies, grade C) | tPHL, tPLH | 29 | 40 | 50 | ns | 50%输入至50%输出 | 3 |
| Pulse width distortion PWD (5 V supplies, grade C) | PWD | 2 | 5 | ns | /tPLH − tPHL/ | 3 | |
| Pulse width distortion temperature coefficient (5 V supplies, grade C) | 3 | ps/°C | 3 | ||||
| Pulse width PW (5 V supplies, grade C) | PW | 40 | ns | 在PWD限值内 | 3 | ||
| Propagation delay skew tPSK (5 V supplies, grade C) | tPSK | 10 | ns | 3 | |||
| Channel matching, same direction tPSKCD (5 V supplies, grade C) | tPSKCD | 2 | 4 | ns | 3 | ||
| Channel matching, opposite direction tPSKOD (5 V supplies, grade C) | tPSKOD | 3 | 6 | ns | 3 | ||
| Jitter (5 V supplies, grade C) | 2 | ns | 3 | ||||
| Supply current IDD1, ADuM7440 (5 V, 25 Mbps grade C) | IDD1 | 28 | 35 | mA | 3 | ||
| Supply current IDD2, ADuM7440 (5 V, 25 Mbps grade C) | IDD2 | 6 | 11 | mA | 3 | ||
| Supply current IDD1, ADuM7441 (5 V, 25 Mbps grade C) | IDD1 | 18 | 26 | mA | 3 | ||
| Supply current IDD2, ADuM7441 (5 V, 25 Mbps grade C) | IDD2 | 8.5 | 14 | mA | 3 | ||
| Supply current IDD1, ADuM7442 (5 V, 25 Mbps grade C) | IDD1 | 15 | 20 | mA | 3 | ||
| Supply current IDD2, ADuM7442 (5 V, 25 Mbps grade C) | IDD2 | 12 | 17 | mA | 3 | ||
| Propagation delay tPHL, tPLH (3.3 V supplies, grade C) | tPHL, tPLH | 37 | 51 | 66 | ns | 50%输入至50%输出 | 4 |
| Pulse width distortion PWD (3.3 V supplies, grade C) | PWD | 2 | 5 | ns | /tPLH − tPHL/ | 4 | |
| Pulse width distortion temperature coefficient (3.3 V supplies, grade C) | 3 | ps/°C | 4 | ||||
| Pulse width PW (3.3 V supplies, grade C) | PW | 40 | ns | 在PWD限值内 | 4 | ||
| Propagation delay skew tPSK (3.3 V supplies, grade C) | tPSK | 10 | ns | 4 | |||
| Channel matching, same direction tPSKCD (3.3 V supplies, grade C) | tPSKCD | 3 | 5 | ns | 4 | ||
| Channel matching, opposite direction tPSKOD (3.3 V supplies, grade C) | tPSKOD | 4 | 7 | ns | 4 | ||
| Jitter (3.3 V supplies, grade C) | 2 | ns | 4 | ||||
| Supply current IDD1, ADuM7440 (3.3 V, 25 Mbps grade C) | IDD1 | 20 | 28 | mA | 4 | ||
| Supply current IDD2, ADuM7440 (3.3 V, 25 Mbps grade C) | IDD2 | 4 | 5 | mA | 4 | ||
| Supply current IDD1, ADuM7441 (3.3 V, 25 Mbps grade C) | IDD1 | 14 | 20 | mA | 4 | ||
| Supply current IDD2, ADuM7441 (3.3 V, 25 Mbps grade C) | IDD2 | 5.5 | 7.5 | mA | 4 | ||
| Supply current IDD1, ADuM7442 (3.3 V, 25 Mbps grade C) | IDD1 | 10 | 13 | mA | 4 | ||
| Supply current IDD2, ADuM7442 (3.3 V, 25 Mbps grade C) | IDD2 | 8.4 | 11 | mA | 4 | ||
| Logic low output voltage VOL (5 V, 20 µA load) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 3 | |
| Logic low output voltage VOL (5 V, 4 mA load) | VOL | 0.2 | 0.4 | V | IOx = 4 mA, VIx = VIxL | 3 | |
| Input current per channel II (all models) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 3 |
| Static input supply current IDDI(Q) (5 V) | IDDI(Q) | 0.76 | 0.95 | mA | 3 | ||
| Static output supply current IDDO(Q) (5 V) | IDDO(Q) | 0.57 | 0.73 | mA | 3 | ||
| Output rise/fall time tR/tF (5 V) | tR/tF | 2 | ns | 10%至90% | 3 | ||
| Common-mode transient immunity /CM/ (5 V) | /CM/ | 15 | 25 | kV/µs | VIx = VDDx, VCM = 1000 V, 瞬变幅度 = 800 V | 3 | |
| Logic low output voltage VOL (3.3 V, 20 µA load) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 4 | |
| Logic low output voltage VOL (3.3 V, 4 mA load) | VOL | 0.2 | 0.4 | V | IOx = 4 mA, VIx = VIxL | 4 | |
| Static input supply current IDDI(Q) (3.3 V) | IDDI(Q) | 0.5 | mA | 4 | |||
| Static output supply current IDDO(Q) (3.3 V) | IDDO(Q) | 0.41 | mA | 4 | |||
| Output rise/fall time tR/tF (3.3 V) | tR/tF | 2.8 | ns | 10% 至 90% | 4 | ||
| Common-mode transient immunity /CM/ (3.3 V) | /CM/ | 15 | 20 | kV/µs | VIx = VDDx, VCM = 1000 V, 瞬变幅度 = 800 V | 4 | |
| Operating temperature TA | TA | -40 | 105 | °C | 7 | ||
| Supply voltage VDD1, VDD2 | VDD1, VDD2 | 3 | 5.5 | V | All voltages referenced to their respective grounds | 7 | |
| Input signal rise and fall time | 1 | ms | 7 | ||||
| Storage temperature TST | TST | -65 | 150 | °C | 8 | ||
| Operating ambient temperature TA | TA | -40 | 105 | °C | 8 | ||
| Supply voltage VDD1, VDD2 | VDD1, VDD2 | -0.5 | 7 | V | 8 | ||
| Input voltage VIA, VIB, VIC, VID, VSEL (max VDDI + 0.5 V) | VIA, VIB, VIC, VID, VSEL | -0.5 | V | 8 | |||
| Output voltage VOA, VOB, VOC, VOD (max VDDO + 0.5 V) | VOA, VOB, VOC, VOD | -0.5 | V | 8 | |||
| Average output current per pin, side 1 | IO1 | -10 | 10 | mA | 8 | ||
| Average output current per pin, side 2 | IO2 | -10 | 10 | mA | 8 | ||
| Common-mode transient | -100 | 100 | kV/µs | 8 | |||
| Logic high output voltage VOH (min VDDx − 0.1; 5 V, 20 µA) | VOH | 5 | V | IOx = −20 µA, VIx = VIxH | 3 | ||
| Logic high output voltage VOH (min VDDx − 0.4; 5 V, 4 mA) | VOH | 4.8 | V | IOx = −4 mA, VIx = VIxH | 3 | ||
| Logic high output voltage VOH (min VDDx − 0.2; 3.3 V, 20 µA) | VOH | 3.3 | V | IOx = −20 µA, VIx = VIxH | 4 | ||
| Logic high output voltage VOH (min VDDx − 0.4; 3.3 V, 4 mA) | VOH | 3.1 | V | IOx = −4 mA, VIx = VIxH | 4 | ||
| Thermal resistance IC junction-to-ambient θJA | θJA | 76 | °C/W | 热电偶位于封装底部正中间 | 7 |
CAD (KiCad official)
- Symbol:
ADUM7440CRQZ-RL7 - Footprint:
Package_SO:QSOP-16_3.9x4.9mm_P0.635mm - 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files:
adum7440crqz-rl7-etched.step/adum7440crqz-rl7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum7440crqz-rl7.step/adum7440crqz-rl7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
c11af70ebcd80805, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).