component
ADUM5211ARSZ
Public Made by Adomby adom
Analog Devices Digital Isolators, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADUM5211ARSZ
Analog Devices · Digital Isolators · SSOP-20-208mil
ADUM5211ARSZ from Analog Devices, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Power supply for the side 1 logic circuits; independent of VDDP and operable between 3.135 V and 5.5 V. |
| 2 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 3 | VOA | output | Logic Output A for the ADuM5211 channel assignment (Table 1), driven from the side 2 data path. |
| 4 | VIB | input | Logic Input B for the ADuM5211 channel assignment (Table 1). |
| 5 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 6 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 7 | NC | unconnected | Not connected internally. |
| 8 | PDIS | input | Power disable: a logic low enables the power converter, while a logic high places the power supply in low power standby mode. |
| 9 | VDDP | power_in | Primary isoPower supply voltage, 3.135 V to 5.5 V. |
| 10 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 11 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 12 | VISO | power_out | Secondary supply voltage output for external loads, 3.3 V when VSEL is low or 5.0 V when VSEL is high. |
| 13 | VSEL | input | Output voltage select: a thermally matched resistor network between VISO and GNDISO divides the output to match the 1.25 V reference, with VISO programmable up to 20% higher or 75% lower than VDDP within the allowed output range. |
| 14 | NC | unconnected | Not connected internally. |
| 15 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 16 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 17 | VOB | output | Logic Output B for the ADuM5211 channel assignment (Table 1). |
| 18 | VIA | input | Logic Input A for the ADuM5211 channel assignment (Table 1). |
| 19 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 20 | VDD2 | power_in | Power supply for the side 2 logic circuits; independent of VISO and operable between 3.135 V and 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SSOP-20-208mil |
| Category | Interface ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | TA | -40 | 105 | °C | Operation at 105°C requires reduction of maximum load current (Table 18) | 11 | |
| Supply Voltage VDDP at VISO = 3.135 V to 3.6 V | VDDP | 3.135 | 5.5 | V | VDDP at VISO = 3.135 V to 3.6 V | 11 | |
| Supply Voltage VDDP at VISO = 4.5 V to 5.5 V | VDDP | 4.5 | 5.5 | V | VDDP at VISO = 4.5 V to 5.5 V | 11 | |
| Supply Voltages VDD1, VDD2 | VDD1, VDD2 | 3.135 | 5.5 | V | 11 | ||
| Storage Temperature | TST | -55 | 150 | °C | 12 | ||
| Ambient Operating Temperature | TA | -40 | 105 | °C | 12 | ||
| Supply Voltages (VDDP, VDD1, VDD2, VISO) | -0.5 | 7 | V | 12 | |||
| VISO Supply Current | 30 | mA | TA = −40°C to +105°C | 12 | |||
| Input Voltage (VIA, VIB, PDIS, VSEL) | -0.5 | V | Maximum printed as VDDI + 0.5 V (expression, not numeric) | 12 | |||
| Output Voltage (VOA, VOB) | -0.5 | V | Maximum printed as VDDO + 0.5 V (expression, not numeric) | 12 | |||
| Average Output Current Per Data Output Pin | -10 | 10 | mA | 12 | |||
| Common-Mode Transients | -100 | 100 | kV/µs | 12 | |||
| Maximum Total Power Dissipation | PTOT | 2.5 | W | TA ≤ 25°C, PTOT = PSI = PSO | 9 | ||
| Junction-to-Air Thermal Impedance | θJA | 50 | °C/W | See the Thermal Analysis section | 9 | ||
| DC-to-DC Setpoint (5 V/5 V) | VISO | 4.675 | 5 | 5.325 | V | IISO = 15 mA, R1 = 10 kΩ, R2 = 30.9 kΩ | 4 |
| Thermal Coefficient (5 V/5 V) | VISO (TC) | -44 | µV/°C | 4 | |||
| Line Regulation (5 V/5 V) | VISO (LINE) | 20 | mV/V | IISO = 15 mA, VDDP = 4.5 V to 5.5 V | 4 | ||
| Load Regulation (5 V/5 V) | VISO (LOAD) | 1.3 | 3 | % | IISO = 3 mA to 27 mA | 4 | |
| Output Ripple (5 V/5 V) | VISO (RIP) | 75 | mV p-p | 20 MHz bandwidth, CBO = 0.1 µF//10 µF, IISO = 27 mA | 4 | ||
| Output Noise (5 V/5 V) | VISO (NOISE) | 200 | mV p-p | CBO = 0.1 µF//10 µF, IISO = 27 mA | 4 | ||
| Output Supply Current (5 V/5 V) | IISO (MAX) | 30 | mA | 5.5 V > VISO > 4.5 V | 4 | ||
| Efficiency at IISO (MAX) (5 V/5 V) | 29 | % | IISO = 27 mA | 4 | |||
| IDDP, No VISO Load (5 V/5 V) | IDDP (Q) | 6.8 | 12 | mA | 4 | ||
| IDDP, Full VISO Load (5 V/5 V) | IDDP (MAX) | 104 | mA | 4 | |||
| Switching Frequency | fOSC | 125 | MHz | 4 | |||
| Pulse-Width Modulation Frequency | fPWM | 600 | kHz | 4 | |||
| Thermal Shutdown Temperature | 154 | °C | 4 | ||||
| Thermal Hysteresis | 10 | °C | 4 | ||||
| ADuM5211 VDD1 Supply Current, 1 Mbps (A grade, 5 V) | IDD1 | 2.1 | 2.7 | mA | CL = 0 pF | 4 | |
| ADuM5211 VDD2 Supply Current, 1 Mbps (A grade, 5 V) | IDD2 | 2.3 | 2.9 | mA | CL = 0 pF | 4 | |
| Data Rate (A grade) | 1 | Mbps | Within PWD limit | 4 | |||
| Propagation Delay (A grade, 5 V/5 V) | tPHL, tPLH | 50 | ns | 50% input to 50% output | 4 | ||
| Pulse Width Distortion (A grade, 5 V/5 V) | PWD | 10 | ns | /tPLH − tPHL/ | 4 | ||
| Pulse Width (A grade) | PW | 1000 | ns | Within PWD limit | 4 | ||
| Propagation Delay Skew (A grade) | tPSK | 38 | ns | Between any two units | 4 | ||
| Channel Matching Codirectional (A grade) | tPSKCD | 5 | ns | 4 | |||
| Channel Matching Opposing Direction (A grade) | tPSKOD | 10 | ns | 4 | |||
| Jitter (A grade) | 2 | ns | 4 | ||||
| Logic Low Output Voltage (5 V/5 V) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 5 | |
| Logic Low Output Voltage (5 V/5 V) | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 5 | |
| Undervoltage Lockout Positive Going Threshold | VUV+ | 2.6 | V | 5 | |||
| Undervoltage Lockout Negative Going Threshold | VUV− | 2.4 | V | 5 | |||
| Undervoltage Lockout Hysteresis | VUVH | 0.2 | V | 5 | |||
| Quiescent Input Supply Current per Channel (5 V/5 V) | IDDI(Q) | 0.54 | 0.8 | mA | 5 | ||
| Quiescent Output Supply Current per Channel (5 V/5 V) | IDDO(Q) | 1.6 | 2 | mA | 5 | ||
| Dynamic Input Supply Current per Channel (5 V/5 V) | IDDI(D) | 0.09 | mA/Mbps | 5 | |||
| Dynamic Output Supply Current per Channel (5 V/5 V) | IDDO(D) | 0.04 | mA/Mbps | 5 | |||
| Input Currents per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 5 |
| Output Rise/Fall Time (5 V/5 V) | tR/tF | 2.5 | ns | 10% to 90% | 5 | ||
| Common-Mode Transient Immunity (5 V/5 V) | /CM/ | 25 | 35 | kV/µs | VIx = VDD1 or VISO, VCM = 1000 V, transient magnitude = 800 V | 5 | |
| Refresh Rate | tr | 1.6 | µs | 5 | |||
| ADuM5211 VDD1 Supply Current, 1 Mbps (A grade, 3.3 V/3.3 V) | IDD1 | 1.6 | 2.1 | mA | CL = 0 pF | 6 | |
| ADuM5211 VDD2 Supply Current, 1 Mbps (A grade, 3.3 V/3.3 V) | IDD2 | 1.7 | 2.3 | mA | CL = 0 pF | 6 | |
| DC-to-DC Setpoint (3.3 V/3.3 V) | VISO | 3.135 | 3.3 | 3.51 | V | IISO = 10 mA, R1 = 10 kΩ, R2 = 16.9 kΩ | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs | 5 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up | 12 |
CAD (KiCad official)
- Symbol:
ADUM5211ARSZ - Footprint:
Package_SO:SSOP-20_5.3x7.2mm_P0.65mm - 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files:
adum5211arsz-etched.step/adum5211arsz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum5211arsz.step/adum5211arsz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (23 pp, sha256
e4c5c82979591a34, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADUM5211ARSZ
**Analog Devices** · Digital Isolators · SSOP-20-208mil
ADUM5211ARSZ from Analog Devices, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Power supply for the side 1 logic circuits; independent of VDDP and operable between 3.135 V and 5.5 V. |
| 2 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 3 | VOA | output | Logic Output A for the ADuM5211 channel assignment (Table 1), driven from the side 2 data path. |
| 4 | VIB | input | Logic Input B for the ADuM5211 channel assignment (Table 1). |
| 5 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 6 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 7 | NC | unconnected | Not connected internally. |
| 8 | PDIS | input | Power disable: a logic low enables the power converter, while a logic high places the power supply in low power standby mode. |
| 9 | VDDP | power_in | Primary isoPower supply voltage, 3.135 V to 5.5 V. |
| 10 | GNDP | power_in | Ground reference for isolator side 1; internally connected to the other GNDP pins and recommended to be tied to a common ground. |
| 11 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 12 | VISO | power_out | Secondary supply voltage output for external loads, 3.3 V when VSEL is low or 5.0 V when VSEL is high. |
| 13 | VSEL | input | Output voltage select: a thermally matched resistor network between VISO and GNDISO divides the output to match the 1.25 V reference, with VISO programmable up to 20% higher or 75% lower than VDDP within the allowed output range. |
| 14 | NC | unconnected | Not connected internally. |
| 15 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 16 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 17 | VOB | output | Logic Output B for the ADuM5211 channel assignment (Table 1). |
| 18 | VIA | input | Logic Input A for the ADuM5211 channel assignment (Table 1). |
| 19 | GNDISO | power_in | Ground reference for isolator side 2; internally connected to the other GNDISO pins and recommended to be tied to a common ground. |
| 20 | VDD2 | power_in | Power supply for the side 2 logic circuits; independent of VISO and operable between 3.135 V and 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SSOP-20-208mil |
| Category | Interface ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | TA | -40 | | 105 | °C | Operation at 105°C requires reduction of maximum load current (Table 18) | 11 |
| Supply Voltage VDDP at VISO = 3.135 V to 3.6 V | VDDP | 3.135 | | 5.5 | V | VDDP at VISO = 3.135 V to 3.6 V | 11 |
| Supply Voltage VDDP at VISO = 4.5 V to 5.5 V | VDDP | 4.5 | | 5.5 | V | VDDP at VISO = 4.5 V to 5.5 V | 11 |
| Supply Voltages VDD1, VDD2 | VDD1, VDD2 | 3.135 | | 5.5 | V | | 11 |
| Storage Temperature | TST | -55 | | 150 | °C | | 12 |
| Ambient Operating Temperature | TA | -40 | | 105 | °C | | 12 |
| Supply Voltages (VDDP, VDD1, VDD2, VISO) | | -0.5 | | 7 | V | | 12 |
| VISO Supply Current | | | | 30 | mA | TA = −40°C to +105°C | 12 |
| Input Voltage (VIA, VIB, PDIS, VSEL) | | -0.5 | | | V | Maximum printed as VDDI + 0.5 V (expression, not numeric) | 12 |
| Output Voltage (VOA, VOB) | | -0.5 | | | V | Maximum printed as VDDO + 0.5 V (expression, not numeric) | 12 |
| Average Output Current Per Data Output Pin | | -10 | | 10 | mA | | 12 |
| Common-Mode Transients | | -100 | | 100 | kV/µs | | 12 |
| Maximum Total Power Dissipation | PTOT | | | 2.5 | W | TA ≤ 25°C, PTOT = PSI = PSO | 9 |
| Junction-to-Air Thermal Impedance | θJA | | 50 | | °C/W | See the Thermal Analysis section | 9 |
| DC-to-DC Setpoint (5 V/5 V) | VISO | 4.675 | 5 | 5.325 | V | IISO = 15 mA, R1 = 10 kΩ, R2 = 30.9 kΩ | 4 |
| Thermal Coefficient (5 V/5 V) | VISO (TC) | | -44 | | µV/°C | | 4 |
| Line Regulation (5 V/5 V) | VISO (LINE) | | 20 | | mV/V | IISO = 15 mA, VDDP = 4.5 V to 5.5 V | 4 |
| Load Regulation (5 V/5 V) | VISO (LOAD) | | 1.3 | 3 | % | IISO = 3 mA to 27 mA | 4 |
| Output Ripple (5 V/5 V) | VISO (RIP) | | 75 | | mV p-p | 20 MHz bandwidth, CBO = 0.1 µF//10 µF, IISO = 27 mA | 4 |
| Output Noise (5 V/5 V) | VISO (NOISE) | | 200 | | mV p-p | CBO = 0.1 µF//10 µF, IISO = 27 mA | 4 |
| Output Supply Current (5 V/5 V) | IISO (MAX) | | 30 | | mA | 5.5 V > VISO > 4.5 V | 4 |
| Efficiency at IISO (MAX) (5 V/5 V) | | | 29 | | % | IISO = 27 mA | 4 |
| IDDP, No VISO Load (5 V/5 V) | IDDP (Q) | | 6.8 | 12 | mA | | 4 |
| IDDP, Full VISO Load (5 V/5 V) | IDDP (MAX) | | 104 | | mA | | 4 |
| Switching Frequency | fOSC | | 125 | | MHz | | 4 |
| Pulse-Width Modulation Frequency | fPWM | | 600 | | kHz | | 4 |
| Thermal Shutdown Temperature | | | 154 | | °C | | 4 |
| Thermal Hysteresis | | | 10 | | °C | | 4 |
| ADuM5211 VDD1 Supply Current, 1 Mbps (A grade, 5 V) | IDD1 | | 2.1 | 2.7 | mA | CL = 0 pF | 4 |
| ADuM5211 VDD2 Supply Current, 1 Mbps (A grade, 5 V) | IDD2 | | 2.3 | 2.9 | mA | CL = 0 pF | 4 |
| Data Rate (A grade) | | | 1 | | Mbps | Within PWD limit | 4 |
| Propagation Delay (A grade, 5 V/5 V) | tPHL, tPLH | | 50 | | ns | 50% input to 50% output | 4 |
| Pulse Width Distortion (A grade, 5 V/5 V) | PWD | | 10 | | ns | /tPLH − tPHL/ | 4 |
| Pulse Width (A grade) | PW | | 1000 | | ns | Within PWD limit | 4 |
| Propagation Delay Skew (A grade) | tPSK | | 38 | | ns | Between any two units | 4 |
| Channel Matching Codirectional (A grade) | tPSKCD | | 5 | | ns | | 4 |
| Channel Matching Opposing Direction (A grade) | tPSKOD | | 10 | | ns | | 4 |
| Jitter (A grade) | | | 2 | | ns | | 4 |
| Logic Low Output Voltage (5 V/5 V) | VOL | | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 5 |
| Logic Low Output Voltage (5 V/5 V) | VOL | | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 5 |
| Undervoltage Lockout Positive Going Threshold | VUV+ | | 2.6 | | V | | 5 |
| Undervoltage Lockout Negative Going Threshold | VUV− | | 2.4 | | V | | 5 |
| Undervoltage Lockout Hysteresis | VUVH | | 0.2 | | V | | 5 |
| Quiescent Input Supply Current per Channel (5 V/5 V) | IDDI(Q) | | 0.54 | 0.8 | mA | | 5 |
| Quiescent Output Supply Current per Channel (5 V/5 V) | IDDO(Q) | | 1.6 | 2 | mA | | 5 |
| Dynamic Input Supply Current per Channel (5 V/5 V) | IDDI(D) | | 0.09 | | mA/Mbps | | 5 |
| Dynamic Output Supply Current per Channel (5 V/5 V) | IDDO(D) | | 0.04 | | mA/Mbps | | 5 |
| Input Currents per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 5 |
| Output Rise/Fall Time (5 V/5 V) | tR/tF | | 2.5 | | ns | 10% to 90% | 5 |
| Common-Mode Transient Immunity (5 V/5 V) | /CM/ | 25 | 35 | | kV/µs | VIx = VDD1 or VISO, VCM = 1000 V, transient magnitude = 800 V | 5 |
| Refresh Rate | tr | | 1.6 | | µs | | 5 |
| ADuM5211 VDD1 Supply Current, 1 Mbps (A grade, 3.3 V/3.3 V) | IDD1 | | 1.6 | 2.1 | mA | CL = 0 pF | 6 |
| ADuM5211 VDD2 Supply Current, 1 Mbps (A grade, 3.3 V/3.3 V) | IDD2 | | 1.7 | 2.3 | mA | CL = 0 pF | 6 |
| DC-to-DC Setpoint (3.3 V/3.3 V) | VISO | 3.135 | 3.3 | 3.51 | V | IISO = 10 mA, R1 = 10 kΩ, R2 = 16.9 kΩ | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | abs | | 5 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up | 12 |
## CAD (KiCad official)
- Symbol: `ADUM5211ARSZ`
- Footprint: `Package_SO:SSOP-20_5.3x7.2mm_P0.65mm`
- 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
- 3D model files: `adum5211arsz-etched.step` / `adum5211arsz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adum5211arsz.step` / `adum5211arsz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADuM5210_5211_5212.pdf) (23 pp, sha256 `e4c5c82979591a34`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adum5211arsz-datasheet.pdf)