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ADUM4146BRWZ

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Analog Devices Isolators - Gate Drivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)adum4146brwzfactory-2.0.0extractor-text

Verified ADUM4146BRWZ

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADUM4146BRWZ · SOIC-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 17-page datasheet
  • ✓distributor: lcsc C17510307, digikey 505-ADUM4146BRWZ-ND, mouser 584-ADUM4146BRWZ
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-0_6btmec/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adum4146brwz.kicad_sym✓ adum4146brwz.kicad_mod✓ adum4146brwz.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers adum4146brwz: viewers · Ray 4d ago
adum4146brwz-etched.glb Publish 0.1.0 · Ray 4d ago
adum4146brwz-etched.step adum4146brwz: factory component page (tier=mfr) · Ray 4d ago
adum4146brwz-hero.glb adum4146brwz: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
adum4146brwz-hero.overlay.json Publish 0.1.0 · Ray 4d ago
adum4146brwz.glb Publish 0.1.0 · Ray 4d ago
adum4146brwz.kicad_mod Publish 0.1.0 · Ray 4d ago
adum4146brwz.kicad_sym Publish 0.1.0 · Ray 4d ago
adum4146brwz.lbr Publish 0.1.0 · Ray 4d ago
adum4146brwz.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 4d ago

ADUM4146BRWZ

Analog Devices · Isolators - Gate Drivers · SOIC-16

ADUM4146BRWZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS1 power_in Ground reference for the primary side.
2 VI+ input Positive logic CMOS input drive signal, referenced to VSS1 (-0.3 V to +6.5 V).
3 VI− input Negative logic CMOS input drive signal, referenced to VSS1 (-0.3 V to +6.5 V).
4 READY output Open-drain logic output needing a pull-up resistor; high indicates the device is functional and ready, and low precludes the gate drive output from going high.
5 FAULT output Open-drain logic output needing a pull-up resistor; low indicates a desaturation fault and precludes the gate drive output from going high.
6 RESET input CMOS input with 300 kΩ internal pull-down; bring low (for more than 500 ns) to clear a fault.
7 VDD1 power_in Input supply voltage on the primary side, 2.5 V to 5.5 V, referenced to VSS1.
8 VSS1 power_in Ground reference for the primary side.
9 VSS2 power_in Negative supply for the secondary side, -15 V to 0 V, referenced to GND2.
10 DESAT input Desaturation detection input; connect to an external current source or pull-up resistor, a fault asserts FAULT on the primary side and suspends the gate drive.
11 GND2 power_in Ground reference for the secondary side; connect to the source of the SiC MOSFET being driven.
12 VOUT_OFF output Gate drive output current path for the off signal.
13 VDD2 power_in Secondary side input supply voltage, 12 V to 30 V, referenced to VSS2.
14 VOUT_ON output Gate drive output current path for the on signal.
15 GATE_SENSE bidirectional Gate voltage sense input and Miller clamp output; connect to the gate of the power device, or tie to VSS2 when the Miller clamp is not used.
16 VSS2 power_in Negative supply for the secondary side, -15 V to 0 V, referenced to GND2.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD2 Input Voltage VDD2 12 30 V VDD2 − VSS2 ≤ 30 V 4
VSS2 Input Voltage VSS2 -15 0 V 4
VDD2 Quiescent Input Current IDD2 (Q) 4.9 6.5 mA Ready high 4
VSS2 Quiescent Input Current ISS2 (Q) 4.82 6.21 mA Ready high 4
VDD1 Input Voltage VDD1 2.5 6 V 4
VDD1 Input Current, Output Low IDD1 1.78 2.17 mA Output signal low 4
VDD1 Input Current, Output High IDD1 10.45 14.5 mA Output signal high 4
Input Current (VI+ and VI− Only) II -1 0.01 1 µA 4
Logic High Input Voltage VIH 3.5 V VDD1 − VSS1 > 5 V 4
Logic Low Input Voltage VIL 1.5 V VDD1 − VSS1 > 5 V 4
VDD1 Positive Going Threshold VVDD1UV+ 2.43 2.5 V 4
VDD1 Negative Going Threshold VVDD1UV− 2.2 2.34 V 4
VDD2 Positive Going Threshold VVDD2UV+ 11.5 12 V Grade B and Grade C 4
VDD2 Negative Going Threshold VVDD2UV− 10.4 11.1 V Grade B and Grade C 4
FAULT Pull-Down FET Resistance RFAULT_PD_FET 11 50 Ω Tested at 5 mA 4
READY Pull-Down FET Resistance RRDY_PD_FET 11 50 Ω Tested at 5 mA 4
Desaturation Detect Comparator Voltage VDESAT, TH 8.73 9.2 9.61 V Grade B 4
Desaturation Internal Current Source IDESAT_SRC 470 527 593 µA Grade B 4
Miller Clamp Voltage Threshold VCLP_TH 1.75 2 2.25 V Referenced to VSS2 4
Pull-Down NMOS On Resistance RDSON_N 470 807 mΩ Tested at 250 mA 4
Pull-Down NMOS On Resistance RDSON_N 470 807 mΩ Tested at 1 A 5
Pull-Up PMOS On Resistance RDSON_P 471 975 mΩ Tested at 250 mA 5
Pull-Up PMOS On Resistance RDSON_P 479 975 mΩ Tested at 1 A 5
Soft Shutdown NMOS On Resistance RDSON_FAULT 10.2 22 Ω Grade B, tested at 25 mA 5
Internal Miller Clamp Resistance RDSON_MILLER 1.1 2.75 Ω Tested at 100 mA 5
Pulse Width 50 ns CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 3.9 Ω 5
RESET Debounce tDEB_RESET 500 615 700 ns 5
Propagation Delay tDHL, tDLH 55 75 100 ns CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 3.9 Ω 5
Propagation Delay Skew tPSK 25 ns CL = 2 nF, RGON = RGOFF = 3.9 Ω, VDD1 = 5 V to 6 V 5
Output Rise and Fall Time (10% to 90%) tR/tF 11 16 27 ns CL = 2 nF, VDD2 = 15 V, RGON = RGOFF = 3.9 Ω 5
Blanking Capacitor Discharge Switch Masking tMASK 260 300 340 ns 5
Desaturation Comparator Delay tDESAT_DELAY 105 132 160 ns Grade B 5
Time to Report Desaturation Fault to Pin tREPORT 1.2 2.2 µs 5
Static CMTI /CMTI/ 100 kV/µs Common-mode voltage (VCM) = 1500 V 5
Dynamic CMTI /CMTI/ 100 kV/µs VCM = 1500 V 5
Junction to Ambient Thermal Resistance θJA 59.35 °C/W 4-layer printed circuit board (PCB) 5
Junction to Top Thermal Characterization ΨJT 12.74 °C/W 4-layer PCB 5
Operating Temperature (TA Range) TA -40 125 °C 7
VDD1 Supply Voltage VDD1 2.5 6 V Referenced to VSS1 7
VDD2 Supply Voltage VDD2 12 30 V Referenced to GND2 7
VSS2 Supply Voltage VSS2 -15 0 V Referenced to GND2 7
VDD1 Supply Voltage VDD1 -0.3 6.5 V Referenced to VSS1 8
VDD2 Supply Voltage VDD2 -0.3 35 V Referenced to GND2 8
VSS2 Supply Voltage VSS2 -20 0.3 V Referenced to GND2 8
VDD2 − VSS2 VDD2 − VSS2 35 V 8
Input Voltages VI+, VI− VI+, VI− -0.3 6.5 V Referenced to VSS1 8
DESAT Voltage VDESAT -0.3 V Upper limit VDD2 + 0.3 V, referenced to GND2 8
Common-Mode Transients /CM/ -150 150 kV/µs 8
Storage Temperature Range TST -55 150 °C 8
Operating Temperature (TA Range) TA -40 125 °C 8
RESET Internal Pull-Down RRESET_PD 300 kΩ 4
VDD1 Hysteresis VVDD1UVH 0.09 V 4
VDD2 Hysteresis VVDD2UVH 0.4 V 4
TSD Positive Edge TTSD_POS 155 °C 4
TSD Hysteresis TTSD_HYST 20 °C 4
Short-Circuit Source Current ISC_SOURCE 11 A VDD2 = 15 V, 0 Ω gate resistance 5
Short-Circuit Sink Current ISC_SINK 9 A VDD2 = 15 V, 0 Ω gate resistance 5
Peak Current IPK 4.61 A VDD2 = 12 V, 2 Ω gate resistance 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN V VDE V 0884-11, each ADuM4146 is proof tested by applying an insulation test voltage ≥ 4031 V peak for 1 second (partial discharge detection limit = 5 pC). 6

CAD (KiCad official)

  • Symbol: ADUM4146BRWZ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: adum4146brwz-etched.step / adum4146brwz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum4146brwz.step / adum4146brwz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (17 pp, sha256 82d414a6f5eff6ec, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF