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ADUM4135BRWZ

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Analog Devices Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADUM4135BRWZ

Analog Devices · Digital Isolators · SOIC-16-300mil

ADUM4135BRWZ from Analog Devices, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS1 power_in Ground reference for the primary (low-voltage) side; low-side voltages are referenced to VSS1.
2 VI+ input Positive logic CMOS drive input; with VI− low it accepts positive logic, and VIH is 0.7 × VDD1 for 2.3 V ≤ VDD1 ≤ 5 V (VIL is 0.29 × VDD1 in that range).
3 VI− input Negative logic CMOS drive input; with VI+ held high it accepts negative logic (VIH/VIL limits as for VI+).
4 READY output Open-drain output that requires a pull-up resistor; high indicates the device is functional, and READY low precludes the gate drive output from going high.
5 FAULT output Open-drain output that requires a pull-up resistor; low indicates a desaturation fault, and a fault precludes the gate drive output from going high.
6 RESET input CMOS input with an internal 300 kΩ pull-down; when a fault exists, RESET must be held low for at least 500 ns (debounce) to clear it.
7 VDD1 power_in Primary-side input supply voltage, 2.3 V to 5.5 V referenced to VSS1, per the pin description table.
8 VSS1 power_in Ground reference for the primary side (second VSS1 pin, shorted internally to pin 1).
9 VSS2 power_in Negative secondary-side supply, −15 V to 0 V referenced to GND2.
10 DESAT input Desaturation detection pin, connected to an external current source or pull-up resistor; it asserts a fault when the pin exceeds VDESAT,TH (9.2 V typical, 8.73 V to 9.61 V), and the internal current source is 537 µA typical.
11 GND2 power_in Secondary-side ground reference, connected to the emitter of the IGBT or source of the MOSFET being driven; VDD2 is referenced to GND2.
12 VOUT_OFF output Gate drive output current path for the off signal, with the absolute maximum range −0.3 V to VDD2 + 0.3 V.
13 VDD2 power_in Secondary-side input supply voltage, 12 V to 30 V referenced to GND2.
14 VOUT_ON output Gate drive output current path for the on signal, with the absolute maximum range −0.3 V to VDD2 + 0.3 V.
15 GATE_SENSE bidirectional Gate voltage sense input and Miller clamp output that connects to the gate of the driven device; tie to VSS2 when the Miller clamp is not used.
16 VSS2 power_in Negative secondary-side supply, −15 V to 0 V referenced to GND2 (second VSS2 pin, shorted internally to pin 9).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VDD2 (high-side supply) VDD2 12 30 V VDD2 − VSS2 ≤ 30 V 3
Input Voltage VSS2 (negative supply) VSS2 -15 0 V 3
VDD1 Input Voltage (logic supply) VDD1 2.3 6 V 3
Input Current (VI+, VI− only) II -1 0.01 1 µA 3
Logic High Input Voltage VIH 3.5 V VDD1 − VSS1 > 5 V 3
Logic Low Input Voltage VIL 1.5 V VDD1 − VSS1 > 5 V 3
VDD1 Positive Going UVLO Threshold VVDD1UV+ 2.23 2.3 V 3
VDD1 Negative Going UVLO Threshold VVDD1UV− 2 2.135 V 3
VDD2 Positive Going UVLO Threshold VVDD2UV+ 11.5 12 V 3
VDD2 Negative Going UVLO Threshold VVDD2UV− 10.4 11.1 V 3
FAULT Pull-Down FET Resistance RFAULT_PD_FET 11 50 Ω Tested at 5 mA 3
READY Pull-Down FET Resistance RRDY_PD_FET 11 50 Ω Tested at 5 mA 3
Desaturation Detect Comparator Voltage VDESAT, TH 8.73 9.2 9.61 V 3
Internal Current Source IDESAT_SRC 481 537 593 µA 3
Miller Clamp Voltage Threshold VCLP_TH 1.75 2 2.25 V Referenced to VSS2 3
Input Current, Quiescent Ready high (VDD2) IDD2 (Q) 3.62 4.37 mA 3
Input Current, Quiescent Ready high (VSS2) ISS2 (Q) 4.82 6.21 mA 3
Logic Supply Input Current, Output Low IDD1 1.78 2.17 mA Output signal low 3
Logic Supply Input Current, Output High IDD1 4.78 5.89 mA Output signal high 3
Internal NMOS Gate Resistance RDSON_N 315 625 mΩ Tested at 250 mA 3
Internal NMOS Gate Resistance RDSON_N 318 625 mΩ Tested at 1 A 3
Internal PMOS Gate Resistance RDSON_P 471 975 mΩ Tested at 250 mA 3
Internal PMOS Gate Resistance RDSON_P 479 975 mΩ Tested at 1 A 3
Soft Shutdown NMOS Resistance RDSON_FAULT 10.2 22 Ω Tested at 250 mA 4
Internal Miller Clamp Resistance RDSON_MILLER 1.1 2.75 Ω Tested at 100 mA 4
Pulse Width PW 50 ns CL = 2 nF, VDD2 = 15 V, RGON2 = RGOFF2 = 3.9 Ω 4
RESET Debounce tDEB_RESET 500 615 700 ns 4
Propagation Delay tDHL, tDLH 40 55 66 ns CL = 2 nF, VDD2 = 15 V, RGON2 = RGOFF2 = 3.9 Ω 4
Output Rise/Fall Time (10% to 90%) tR/tF 11 16 22.9 ns CL = 2 nF, VDD2 = 15 V, RGON2 = RGOFF2 = 3.9 Ω 4
Blanking Capacitor Discharge Switch Masking Time tDESAT_DELAY 213 312 529 ns 4
Time to Report Desaturation Fault to FAULT Pin tREPORT 0.5 2 µs 4
Recommended Operating Temperature Range (TA) TA -40 125 °C 6
Supply Voltage VDD1 VDD1 2.3 6 V Referenced to VSS1 6
Supply Voltage VDD2 VDD2 12 30 V Referenced to GND2 6
Supply Voltage VDD2 − VSS2 VDD2 − VSS2 12 30 V Referenced to GND2 6
Supply Voltage VSS2 VSS2 -15 0 V Referenced to GND2 6
Input Signal Rise/Fall Time 1 ms 6
Static Common-Mode Transient Immunity -100 100 kV/µs 6
Dynamic Common-Mode Transient Immunity -100 100 kV/µs 6
Storage Temperature Range (TST) TST -55 150 °C 7
Ambient Operating Temperature Range (TA) TA -40 125 °C 7
Supply Voltage VDD1 VDD1 -0.3 6.5 V Referenced to VSS1 7
Supply Voltage VDD2 VDD2 -0.3 40 V Referenced to GND2 7
Supply Voltage VSS2 VSS2 -20 0.3 V Referenced to GND2 7
Supply Voltage VDD2 − VSS2 VDD2 − VSS2 35 V 7
Input Voltages VI+, VI−, RESET VI+, VI−, RESET -0.3 6.5 V 7
Input Voltage VDESAT VDESAT -0.3 V Upper limit printed as VDD2 + 0.3 V 7
Input Voltage VGATE_SENSE VGATE_SENSE -0.3 V Upper limit printed as VDD2 + 0.3 V 7
Output Voltage VOUT_ON VOUT_ON -0.3 V Upper limit printed as VDD2 + 0.3 V 7
Output Voltage VOUT_OFF VOUT_OFF -0.3 V Upper limit printed as VDD2 + 0.3 V 7
VOUT_ON, VOUT_OFF Current 6 A For 1.5 µs at 15 kHz 7
Common-Mode Transients /CM/ /CM/ -150 150 kV/µs 7
60 Hz AC Working Voltage 600 V rms 20 year lifetime at 0.1% failure rate, zero average voltage 7
DC Working Voltage 1092 V peak Limited by package creepage, Pollution Degree 2, Material Group II 7
Junction to Ambient Thermal Resistance θJA 75.4 °C/W 4-layer printed circuit board (PCB) 5
Junction to Case Thermal Resistance θJC 35.4 °C/W 4-layer printed circuit board (PCB) 5

CAD (KiCad official)

  • Symbol: ADUM4135BRWZ
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: adum4135brwz-etched.step / adum4135brwz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum4135brwz.step / adum4135brwz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (17 pp, sha256 1ec692fcf3b0ba56, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF