ADUM3223WCRZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VIA	input	Logic Input A, CMOS levels referenced to GND1 (VIH 0.7 × VDD1, VIL 0.3 × VDD1).
2	VIB	input	Logic Input B, CMOS levels referenced to GND1 (VIH 0.7 × VDD1, VIL 0.3 × VDD1).
3	VDD1	power_in	Input supply voltage, 3.0 V to 5.5 V; internally connected to pin 8, connecting both pins to VDD1 is recommended.
4	GND1	power_in	Ground reference for input logic signals.
5	DISABLE	input	Input disable; when high it disables the isolator inputs and sets outputs low, with reaction approximately equal to the normal propagation delay.
6	NC	unconnected	No connect; do not connect to this pin.
7	NC	unconnected	No connect; do not connect to this pin.
8	VDD1	power_in	Input supply voltage, 3.0 V to 5.5 V; internally connected to pin 3, connecting both pins to VDD1 is recommended.
9	GNDB	power_in	Ground reference for Output B.
10	VOB	output	Output B, 4 A peak gate drive output.
11	VDDB	power_in	Output B supply voltage, 4.5 V to 18 V.
12	NC	unconnected	No connect; do not connect to this pin.
13	NC	unconnected	No connect; do not connect to this pin.
14	GNDA	power_in	Ground reference for Output A.
15	VOA	output	Output A, 4 A peak gate drive output.
16	VDDA	power_in	Output A supply voltage, 4.5 V to 18 V.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-16
Category	Power Supply Chip
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Supply Current, Quiescent	IDDI(Q)		1.4	2.4	mA	5 V operation, 4.5 V ≤ VDD1 ≤ 5.5 V	3
Output Supply Current, Per Channel, Quiescent	IDDO(Q)		2.3	3.2	mA	4.5 V ≤ VDD2 ≤ 18 V	3
VDD1 Supply Current at 1 MHz	IDD1(Q)		1.6	2.5	mA	5 V operation; Up to 1 MHz, no load	3
VDDA/VDDB Supply Current at 1 MHz	IDDA/IDDB(Q)		5.6	8	mA	Up to 1 MHz, no load	3
Input Currents	IIA, IIB	-1	0.01	1	µA	5 V operation; 0 ≤ VIA, VIB ≤ VDD1	3
Logic Low Output Voltages	VOAL, VOBL		0	0.15	V	IOx = +20 mA, VIx = VIxL	3
UVLO Positive Going Threshold, C-grade	VDD2UV+		10.5	11.1	V	C-grade	3
UVLO Negative Going Threshold, C-grade	VDD2UV−		8.9	9.6	V	C-grade	3
UVLO Hysteresis, C-grade	VDD2UVH		0.9		V	C-grade	3
Output Short-Circuit Pulsed Current	IOA(SC), IOB(SC)	2	4		A	VDD2 = 12 V	3
Output Pulsed Source Resistance	ROA, ROB	0.3	1.1	3	Ω	VDD2 = 12 V	3
Output Pulsed Sink Resistance	ROA, ROB	0.3	0.6	3	Ω	VDD2 = 12 V	3
Pulse Width	PW			50	ns	CL= 2 nF, VDD2 = 12 V	3
Maximum Data Rate		1			MHz	CL= 2 nF, VDD2 = 12 V	3
Propagation Delay, 5 V operation	tDHL, tDLH	31	43	54	ns	CL= 2 nF, VDD2 = 12 V; see Figure 20	3
Propagation Delay Skew	tPSK			12	ns	CL= 2 nF, VDD2 = 12 V; see Figure 20	3
Channel-to-Channel Matching	tPSKCD		1	5	ns	CL= 2 nF, VDD2 = 12 V; see Figure 20	3
Output Rise/Fall Time (10% to 90%), 5 V operation	tR/tF	6	12	18	ns	CL= 2 nF, VDD2 = 12 V; see Figure 20	3
Input Supply Current, Quiescent, 3.3 V operation	IDDI(Q)		0.87	1.4	mA	3.0 V ≤ VDD1 ≤ 3.6 V	4
VDD1 Supply Current at 1 MHz, 3.3 V operation	IDD1(Q)		1.1	1.5	mA	Up to 1 MHz, no load	4
Input Currents, 3.3 V operation	IIA, IIB	-10	0.01	10	µA	0 ≤ VIA, VIB ≤ VDD1	4
Propagation Delay, 3.3 V operation	tDHL, tDLH	35	47	59	ns	CL= 2 nF, VDD2 = 12 V, see Figure 20	4
Output Rise/Fall Time (10% to 90%), 3.3 V operation	tR/tF	6	12	22	ns	CL= 2 nF, VDD2 = 12 V, see Figure 20	4
Junction Temperature Shutdown, Rising Edge	TJR		150		°C		3
Junction Temperature Shutdown, Falling Edge	TJF		140		°C		3
Dynamic Input Supply Current Per Channel	IDDI(D)		0.05		mA/Mbps	VDD2 = 12 V	3
Dynamic Output Supply Current Per Channel	IDDO(D)		1.65		mA/Mbps	VDD2 = 12 V	3
Refresh Rate, 5 V operation	fr		1.2		Mbps		3
Refresh Rate, 3.3 V operation	fr		1.1		Mbps		4
Capacitance (Input-to-Output)	CI-O		2		pF	f = 1 MHz	5
Input Capacitance	CI		4		pF		5
IC Junction-to-Ambient Thermal Resistance, ADuM3223	θJA		76		°C/W		5
IC Junction-to-Case Thermal Resistance, ADuM3223	θJC		42		°C/W		5
Rated Dielectric Insulation Voltage			3000		V rms	1 minute duration	5
Maximum Working Insulation Voltage	VIORM		560		V peak	ADuM3223 VDE	7
Operating Junction Temperature	TJ	-40		125	°C		8
Supply Voltage VDD1	VDD1	3		5.5	V	relative to GND1	8
Supply Voltage VDDA, VDDB	VDDA, VDDB	4.5		18	V		8
VDD1 Rise Time	TVDD1			1	V/µs		8
VDDA, VDDB Rise Time	TVDDA, TVDDB			10	V/µs		8
Maximum Input Signal Rise and Fall Times	TVIA, TVIB			1	ms		8
Common-Mode Transient Immunity, Static		-50		50	kV/µs		8
Common-Mode Transient Immunity, Dynamic		-25		25	kV/µs		8
Storage Temperature	TST	-55		150	°C		9
Operating Junction Temperature	TJ	-40		150	°C		9
Supply Voltage VDD1	VDD1	-0.5		7	V	relative to respective ground	9
Supply Voltage VDDA, VDDB	VDDA, VDDB	-0.5		20	V	relative to respective ground	9
Input Voltage	VIA, VIB, DISABLE	-0.5			V	−0.5 V to VDD1 + 0.5 V	9
Output Voltage VOA	VOA	-0.5			V	−0.5 V to VDDA + 0.5 V	9
Output Voltage VOB	VOB	-0.5			V	−0.5 V to VDDB + 0.5 V	9
Average Output Current, per Pin	IO	-35		35	mA		9
Common-Mode Transients	CMH, CML	-100		100	kV/µs	across the insulation barrier	9

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	abs		3 Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum rating can cause latch-up	9

CAD (KiCad official)

Symbol: ADUM3223WCRZ
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: adum3223wcrz-etched.step / adum3223wcrz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum3223wcrz.step / adum3223wcrz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (20 pp, sha256 a2e0239b3a9ea500, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ADUM3223WCRZ

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3D Model

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