main
History Download
Ray Publish 0.1.0 d16ae0f 10d ago

ADUM3211ARZ

Analog Devices · Digital Isolators · SOIC-8

ADUM3211ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, 3.0 V to 5.5 V relative to GND1.
2 VOA output Logic Output A; per the ADuM3211 truth table, it is L when VDD2 is unpowered and indeterminate when VDD1 is unpowered, returning to the input state within 1 µs of power restoration.
3 VIB input Logic Input B; the datasheet gives no further electrical limits for this pin on page 15.
4 GND1 power_in Ground 1, the ground reference for isolator side 1.
5 GND2 power_in Ground 2, the ground reference for isolator side 2.
6 VOB output Logic Output B; per the ADuM3211 truth table, it is L when VDD1 is unpowered and indeterminate when VDD2 is unpowered, returning to the input state within 1 µs of power restoration.
7 VIA input Logic Input A; the datasheet gives no further electrical limits for this pin on page 15.
8 VDD2 power_in Supply voltage for isolator side 2, 3.0 V to 5.5 V relative to GND2.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Data Rate (A grade) 1 Mbps Within PWD limit 4
Propagation Delay (5 V/5 V) tPHL, tPLH 20 50 ns 50% input to 50% output 4
Propagation Delay (3.3 V/3.3 V) tPHL, tPLH 20 60 ns 50% input to 50% output 5
Propagation Delay (5 V/3.3 V) tPHL, tPLH 15 55 ns 50% input to 50% output 6
Propagation Delay (3.3 V/5 V) tPHL, tPLH 15 55 ns 50% input to 50% output 7
Pulse Width Distortion (5 V/5 V) PWD 5 ns /tPLH − tPHL/ 4
Pulse Width Distortion (3.3 V/3.3 V) PWD 6 ns /tPLH − tPHL/ 5
Pulse Width Distortion (5 V/3.3 V) PWD 5 ns /tPLH − tPHL/ 6
Pulse Width Distortion (3.3 V/5 V) PWD 6 ns /tPLH − tPHL/ 7
Change vs. Temperature 5 ps/°C 4
Pulse Width PW 1000 ns Within PWD limit 4
Propagation Delay Skew (5 V/5 V) tPSK 20 ns Between any two units 4
Propagation Delay Skew (3.3 V/3.3 V) tPSK 29 ns Between any two units 5
Propagation Delay Skew (5 V/3.3 V) tPSK 29 ns Between any two units 6
Propagation Delay Skew (3.3 V/5 V) tPSK 29 ns Between any two units 7
Channel Matching Codirectional (5 V/5 V) tPSKCD 5 ns Codirectional 4
Channel Matching Codirectional (3.3 V/3.3 V) tPSKCD 5 ns Codirectional 5
Channel Matching Codirectional (5 V/3.3 V) tPSKCD 5 ns Codirectional 6
Channel Matching Codirectional (3.3 V/5 V) tPSKCD 15 ns Codirectional 7
Channel Matching Opposing Directional (5 V/5 V) tPSKOD 20 ns Opposing Directional 4
Channel Matching Opposing Directional (3.3 V/3.3 V) tPSKOD 29 ns Opposing Directional 5
Channel Matching Opposing Directional (5 V/3.3 V) tPSKOD 29 ns Opposing Directional 6
Channel Matching Opposing Directional (3.3 V/5 V) tPSKOD 29 ns Opposing Directional 7
Output Rise/Fall Time (5 V/5 V) tR/tF 2.5 ns 10% to 90% 4
Output Rise/Fall Time (3.3 V/3.3 V) tR/tF 3 ns 10% to 90% 5
Output Rise/Fall Time (5 V/3.3 V) tR/tF 3 ns 10% to 90% 6
Output Rise/Fall Time (3.3 V/5 V) tR/tF 2.5 ns 10% to 90% 7
Supply Current IDD1 ADuM3211A (5 V/5 V) IDD1 1.1 1.5 3 mA 1 Mbps, A Grade 4
Supply Current IDD2 ADuM3211A (5 V/5 V) IDD2 1.3 1.8 3.1 mA 1 Mbps, A Grade 4
Supply Current IDD1 ADuM3211A (3.3 V/3.3 V) IDD1 0.7 1.3 1.8 mA 1 Mbps, A Grade 5
Supply Current IDD2 ADuM3211A (3.3 V/3.3 V) IDD2 0.8 1.6 1.9 mA 1 Mbps, A Grade 5
Supply Current IDD1 ADuM3211A (5 V/3.3 V) IDD1 1.1 1.5 2.9 mA 1 Mbps, A Grade 6
Supply Current IDD2 ADuM3211A (5 V/3.3 V) IDD2 0.8 1.6 1.9 mA 1 Mbps, A Grade 6
Supply Current IDD1 ADuM3211A (3.3 V/5 V) IDD1 0.7 1.3 1.8 mA 1 Mbps, A Grade 7
Supply Current IDD2 ADuM3211A (3.3 V/5 V) IDD2 1.3 1.8 3.1 mA 1 Mbps, A Grade 7
Quiescent Input Supply Current (5 V/5 V) IDDI(Q) 0.4 0.8 mA 4
Quiescent Output Supply Current (5 V/5 V) IDDO(Q) 0.4 0.8 mA 4
Quiescent Input Supply Current (3.3 V/3.3 V) IDDI(Q) 0.3 0.5 mA 5
Quiescent Output Supply Current (3.3 V/3.3 V) IDDO(Q) 0.3 0.5 mA 5
Quiescent Input Supply Current (5 V/3.3 V) IDDI(Q) 0.4 0.8 mA 6
Quiescent Output Supply Current (5 V/3.3 V) IDDO(Q) 0.3 0.5 mA 6
Quiescent Input Supply Current (3.3 V/5 V) IDDI(Q) 0.4 0.8 mA 7
Quiescent Output Supply Current (3.3 V/5 V) IDDO(Q) 0.5 0.8 mA 7
Logic Low Output Voltage (20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 4
Logic Low Output Voltage (3.2 mA) VOL 0.2 0.4 V IOx = 3.2 mA, VIx = VIxL 4
Input Current per Channel II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 4
Common-Mode Transient Immunity /CM/ 25 35 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 4
Operating Temperature (ADuM3211A) TA -40 105 °C ADuM3211A 13
Supply Voltages VDD1, VDD2 3 5.5 V 13
Maximum Input Signal Rise and Fall Times 1 ms 13
Storage Temperature TST -55 150 °C 14
Ambient Operating Temperature TA -40 125 °C 14
Supply Voltages VDD1, VDD2 -0.5 7 V Each voltage relative to its respective ground 14
Average Output Current per Pin IO -22 22 mA 14
Common-Mode Transients CMH, CML -100 100 kV/µs 14
IC Junction-to-Case Thermal Resistance, Side 1 θJCI 46 °C/W Thermocouple located at center of package underside 12
IC Junction-to-Case Thermal Resistance, Side 2 θJCO 41 °C/W 12

CAD (KiCad official)

  • Symbol: ADUM3211ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adum3211arz-etched.step / adum3211arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum3211arz.step / adum3211arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (21 pp, sha256 7bfb8fa6977245e4, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF