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ADUM3210WARZ

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Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADUM3210WARZ

Analog Devices · Digital Isolators · SOIC-8

ADUM3210WARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, 3.0 V to 5.5 V, relative to GND1.
2 VIA input Logic input A on side 1; input voltage is limited to -0.5 V to VDDI + 0.5 V relative to GND1.
3 VIB input Logic input B on side 1; input voltage is limited to -0.5 V to VDDI + 0.5 V relative to GND1.
4 GND1 power_in Ground 1, the ground reference for isolator side 1.
5 GND2 power_in Ground 2, the ground reference for isolator side 2.
6 VOB output Logic output B on side 2; output voltage is limited to -0.5 V to VDDO + 0.5 V relative to GND2.
7 VOA output Logic output A on side 2; output voltage is limited to -0.5 V to VDDO + 0.5 V relative to GND2.
8 VDD2 power_in Supply voltage for isolator side 2, 3.0 V to 5.5 V, relative to GND2.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Propagation Delay (5 V, 125°C) tPHL, tPLH 20 50 ns 5 V, 125°C; 50% input to 50% output 8
Pulse Width Distortion (5 V, 125°C) PWD 5 ns 5 V, 125°C; /tPLH − tPHL/ 8
Change vs. Temperature (5 V, 125°C) 6 ps/°C 5 V, 125°C 8
Pulse Width (5 V, 125°C) PW 1000 ns 5 V, 125°C; Within PWD limit 8
Propagation Delay Skew (5 V, 125°C) tPSK 20 ns 5 V, 125°C; Between any two units 8
Channel Matching Codirectional (5 V, 125°C) tPSKCD 5 ns 5 V, 125°C 8
Channel Matching Opposing Directional (5 V, 125°C) tPSKOD 20 ns 5 V, 125°C 8
Output Rise/Fall Time (5 V, 125°C) tR/tF 2.5 ns 5 V, 125°C; 10% to 90% 8
ADuM3210 Supply Current IDD1 (5 V, 125°C, 1 Mbps) IDD1 1.3 1.7 3.5 mA 5 V, 125°C; 1 Mbps, WA Grade 8
ADuM3210 Supply Current IDD2 (5 V, 125°C, 1 Mbps) IDD2 1 1.6 2 mA 5 V, 125°C; 1 Mbps, WA Grade 8
ADuM3211 Supply Current IDD1 (5 V, 125°C, 1 Mbps) IDD1 1.1 1.5 3 mA 5 V, 125°C; 1 Mbps, WA Grade 8
ADuM3211 Supply Current IDD2 (5 V, 125°C, 1 Mbps) IDD2 1.3 1.8 3.1 mA 5 V, 125°C; 1 Mbps, WA Grade 8
Logic Low Output Voltage (5 V, 125°C) VOL 0 0.1 V 5 V, 125°C; IOx = 20 µA, VIx = VIxL 8
Logic Low Output Voltage (5 V, 125°C) VOL 0.2 0.4 V 5 V, 125°C; IOx = 3.2 mA, VIx = VIxL 8
Input Current per Channel (5 V, 125°C) II -10 0.01 10 µA 5 V, 125°C; 0 V ≤ VIx ≤ VDDx 8
Quiescent Input Supply Current (5 V, 125°C) IDDI(Q) 0.4 0.8 mA 5 V, 125°C 8
Quiescent Output Supply Current (5 V, 125°C) IDDO(Q) 0.4 0.8 mA 5 V, 125°C 8
Common-Mode Transient Immunity (5 V, 125°C) /CM/ 25 35 kV/µs 5 V, 125°C; VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 8
Propagation Delay (3.3 V, 125°C) tPHL, tPLH 20 60 ns 3.3 V, 125°C; 50% input to 50% output 9
Pulse Width Distortion (3.3 V, 125°C) PWD 6 ns 3.3 V, 125°C; /tPLH − tPHL/ 9
Change vs. Temperature (3.3 V, 125°C) 6 ps/°C 3.3 V, 125°C 9
Pulse Width (3.3 V, 125°C) PW 1000 ns 3.3 V, 125°C; Within PWD limit 9
Propagation Delay Skew (3.3 V, 125°C) tPSK 29 ns 3.3 V, 125°C; Between any two units 9
Channel Matching Codirectional (3.3 V, 125°C) tPSKCD 5 ns 3.3 V, 125°C 9
Channel Matching Opposing Directional (3.3 V, 125°C) tPSKOD 29 ns 3.3 V, 125°C 9
Output Rise/Fall Time (3.3 V, 125°C) tR/tF 3 ns 3.3 V, 125°C; 10% to 90% 9
ADuM3210 Supply Current IDD1 (3.3 V, 125°C, 1 Mbps) IDD1 0.8 1.3 2.1 mA 3.3 V, 125°C; 1 Mbps, WA Grade 9
ADuM3210 Supply Current IDD2 (3.3 V, 125°C, 1 Mbps) IDD2 0.7 1 1.3 mA 3.3 V, 125°C; 1 Mbps, WA Grade 9
ADuM3211 Supply Current IDD1 (3.3 V, 125°C, 1 Mbps) IDD1 0.7 1.3 1.8 mA 3.3 V, 125°C; 1 Mbps, WA Grade 9
ADuM3211 Supply Current IDD2 (3.3 V, 125°C, 1 Mbps) IDD2 0.8 1.6 1.9 mA 3.3 V, 125°C; 1 Mbps, WA Grade 9
Logic Low Output Voltage (3.3 V, 125°C) VOL 0 0.1 V 3.3 V, 125°C; IOx = 20 µA, VIx = VIxL 9
Logic Low Output Voltage (3.3 V, 125°C) VOL 0.2 0.4 V 3.3 V, 125°C; IOx = 3.2 mA, VIx = VIxL 9
Input Current per Channel (3.3 V, 125°C) II -10 0.01 10 µA 3.3 V, 125°C; 0 V ≤ VIx ≤ VDDx 9
Quiescent Input Supply Current (3.3 V, 125°C) IDDI(Q) 0.3 0.5 mA 3.3 V, 125°C 9
Quiescent Output Supply Current (3.3 V, 125°C) IDDO(Q) 0.3 0.5 mA 3.3 V, 125°C 9
Common-Mode Transient Immunity (3.3 V, 125°C) /CM/ 25 35 kV/µs 3.3 V, 125°C; VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 9
Recommended Operating Temperature TA (WA grade) TA -40 125 °C ADuM3210WA/ADuM3211WA 13
Supply Voltages VDD1, VDD2 3 5.5 V 13
Maximum Input Signal Rise and Fall Times 1 ms 13
Storage Temperature TST -55 150 °C 14
Ambient Operating Temperature (absolute maximum) TA -40 125 °C 14
Supply Voltages (absolute maximum) VDD1, VDD2 -0.5 7 V each voltage relative to its respective ground 14
Input Voltage (absolute maximum) VIA, VIB -0.5 V max is VDDI + 0.5 V 14
Output Voltage (absolute maximum) VOA, VOB -0.5 V max is VDDO + 0.5 V 14
Average Output Current per Pin IO -22 22 mA see Figure 3 for temperature-dependent maximum 14
Common-Mode Transients CMH, CML -100 100 kV/µs 14
Logic High Output Voltage (5 V, 125°C) VOH 5 V 5 V, 125°C; IOx = −20 µA, VIx = VIxH; min is VDDx − 0.1 8
Logic High Output Voltage (5 V, 125°C) VOH 4.8 V 5 V, 125°C; IOx = −3.2 mA, VIx = VIxH; min is VDDx − 0.5 8
Logic High Output Voltage (3.3 V, 125°C) VOH 3 V 3.3 V, 125°C; IOx = −20 µA, VIx = VIxH; min is VDDx − 0.1 9
Logic High Output Voltage (3.3 V, 125°C) VOH 2.8 V 3.3 V, 125°C; IOx = −3.2 mA, VIx = VIxH; min is VDDx − 0.5 9
Thermal Resistance Junction-to-Case, Side 1 θJCI 46 °C/W Thermocouple located at center of package underside 12
Thermal Resistance Junction-to-Case, Side 2 θJCO 41 °C/W 12

CAD (KiCad official)

  • Symbol: ADUM3210WARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adum3210warz-etched.step / adum3210warz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum3210warz.step / adum3210warz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (21 pp, sha256 7bfb8fa6977245e4, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF