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ADUM3210ARZ

Analog Devices · Digital Isolators · SOIC-8

ADUM3210ARZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, 3.0 V to 5.5 V.
2 VIA input Logic input A.
3 VIB input Logic input B.
4 GND1 power_in Ground 1, ground reference for isolator side 1.
5 GND2 power_in Ground 2, ground reference for isolator side 2.
6 VOB output Logic output B.
7 VOA output Logic output A.
8 VDD2 power_in Supply voltage for isolator side 2, 3.0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature (ADuM3210A) TA -40 105 °C ADuM3210A 15
Supply Voltages VDD1, VDD2 3 5.5 V 15
Maximum Input Signal Rise and Fall Times 1 ms 15
Storage Temperature TST -55 150 °C TA = 25°C 16
Ambient Operating Temperature TA -40 125 °C TA = 25°C 16
Supply Voltages VDD1, VDD2 -0.5 7 V relative to respective ground 16
Average Output Current per Pin IO -22 22 mA 16
Common-Mode Transients CMH, CML -100 100 kV/µs across the insulation barrier 16
IC Junction-to-Case Thermal Resistance, Side 1 θJCI 46 °C/W Thermocouple located at center of package underside 13
IC Junction-to-Case Thermal Resistance, Side 2 θJCO 41 °C/W 13
Data Rate (5 V) 1 Mbps 5 V, A grade, within PWD limit 4
Propagation Delay (5 V) tPHL, tPLH 20 50 ns 50% input to 50% output; 5 V, A grade 4
Pulse Width Distortion (5 V) PWD 5 ns /tPLH − tPHL/; 5 V, A grade 4
Change vs. Temperature (5 V) 6 ps/°C 5 V, A grade 4
Pulse Width ADuM3210 (5 V) PW 1000 ns Within PWD limit; A grade 4
Propagation Delay Skew (5 V) tPSK 20 ns Between any two units; 5 V, A grade 4
Channel Matching Codirectional (5 V) tPSKCD 5 ns 5 V, A grade 4
Channel Matching Opposing Directional (5 V) tPSKOD 20 ns 5 V, A grade 4
Output Rise/Fall Time (5 V) tR/tF 2.5 ns 10% to 90%; 5 V 4
Supply Current IDD1, 1 Mbps (5 V) IDD1 1.3 1.7 mA ADuM3210, 5 V, 1 Mbps 4
Supply Current IDD2, 1 Mbps (5 V) IDD2 1 1.6 mA ADuM3210, 5 V, 1 Mbps 4
Logic High Input Threshold (5 V) VIH 0.7 VDDx 4
Logic Low Input Threshold (5 V) VIL 0.3 VDDx 4
Logic Low Output Voltage (5 V) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 4
Logic Low Output Voltage (5 V) VOL 0.2 0.4 V IOx = 3.2 mA, VIx = VIxL 4
Input Current per Channel II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 4
Quiescent Input Supply Current (5 V) IDDI(Q) 0.4 0.8 mA 5 V 4
Quiescent Output Supply Current (5 V) IDDO(Q) 0.4 0.8 mA 5 V 4
Common-Mode Transient Immunity /CM/ 25 35 kV/µs VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V 4
Propagation Delay (3.3 V) tPHL, tPLH 20 60 ns 50% input to 50% output; 3.3 V, A grade 5
Pulse Width Distortion ADuM3210 (3.3 V) PWD 5 ns /tPLH − tPHL/; 3.3 V, A grade 5
Propagation Delay Skew (3.3 V) tPSK 29 ns Between any two units; 3.3 V, A grade 5
Channel Matching Codirectional (3.3 V) tPSKCD 5 ns 3.3 V, A grade 5
Channel Matching Opposing Directional (3.3 V) tPSKOD 29 ns 3.3 V, A grade 5
Output Rise/Fall Time (3.3 V) tR/tF 3 ns 10% to 90%; 3.3 V 5
Supply Current IDD1, 1 Mbps (3.3 V) IDD1 0.8 1.3 mA ADuM3210, 3.3 V, 1 Mbps 5
Supply Current IDD2, 1 Mbps (3.3 V) IDD2 0.7 1 mA ADuM3210, 3.3 V, 1 Mbps 5
Quiescent Input Supply Current (3.3 V) IDDI(Q) 0.3 0.5 mA 3.3 V 5
Quiescent Output Supply Current (3.3 V) IDDO(Q) 0.3 0.5 mA 3.3 V 5
Logic High Output Voltage (5 V) VOH 5 V IOx = −20 µA, VIx = VIxH; min is VDDx − 0.1 4
Logic High Output Voltage (5 V) VOH 4.8 V IOx = −3.2 mA, VIx = VIxH; min is VDDx − 0.5 4
Logic High Output Voltage (3.3 V) VOH 3 V IOx = −20 µA, VIx = VIxH; min is VDDx − 0.1 5
Logic High Output Voltage (3.3 V) VOH 2.8 V IOx = −3.2 mA, VIx = VIxH; min is VDDx − 0.5 5
Dynamic Input Supply Current (5 V) IDDI(D) 0.19 mA/Mbps 5 V 4
Dynamic Output Supply Current (5 V) IDDO(D) 0.05 mA/Mbps 5 V 4
Dynamic Input Supply Current (3.3 V) IDDI(D) 0.1 mA/Mbps 3.3 V 5
Dynamic Output Supply Current (3.3 V) IDDO(D) 0.03 mA/Mbps 3.3 V 6
Refresh Rate (5 V) fr 1.2 Mbps 5 V 4
Refresh Rate (3.3 V) fr 1.1 Mbps 3.3 V 6
Capacitance (Input-to-Output) CI-O 1 pF f = 1 MHz 13
Input Capacitance CI 4 pF 13
Rated Dielectric Insulation Voltage VISO 2500 VRMS 1-minute duration 13
Change vs. Temperature (3.3 V) 6 ps/°C 3.3 V, A grade 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM3210/ADuM3211 is proof tested by applying an insulation test voltage ≥ 1050 VPEAK for 1 sec (partial discharge detection limit = 5 pC). T 13

CAD (KiCad official)

  • Symbol: ADUM3210ARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adum3210arz-etched.step / adum3210arz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum3210arz.step / adum3210arz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 c36aa541c0b5e409, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF