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ADUM3201WBRZ
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Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownADUM3201WBRZ
Analog Devices · Digital Isolators · SOIC-8
ADUM3201WBRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, operating range 3.0 V to 5.5 V relative to GND1. |
| 2 | VOA | output | Logic output A on side 1, driven from the VIA input on side 2. |
| 3 | VIB | input | Logic input B on side 1, with input thresholds of 0.7 VDD1 (high) and 0.3 VDD1 (low). |
| 4 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 5 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 6 | VOB | output | Logic output B on side 2, driven from the VIB input on side 1. |
| 7 | VIA | input | Logic input A on side 2, with input thresholds of 0.7 VDD2 (high) and 0.3 VDD2 (low). |
| 8 | VDD2 | power_in | Supply voltage for isolator side 2, operating range 3.0 V to 5.5 V relative to GND2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Data Rate (5 V/5 V) | 10 | Mbps | WB Grade, within PWD limit | 8 | |||
| Propagation Delay (5 V/5 V) | tPHL, tPLH | 20 | 50 | ns | 50% input to 50% output | 8 | |
| Pulse Width Distortion (5 V/5 V) | PWD | 3 | ns | /tPLH − tPHL/ | 8 | ||
| Pulse Width (5 V/5 V) | PW | 100 | ns | Within PWD limit | 8 | ||
| Propagation Delay Skew (5 V/5 V) | tPSK | 15 | ns | Between any two units | 8 | ||
| Channel Matching Codirectional (5 V/5 V) | tPSKCD | 3 | ns | 8 | |||
| Channel Matching Opposing-Direction (5 V/5 V) | tPSKOD | 15 | ns | 8 | |||
| Supply Current IDD1 ADuM3201, 1 Mbps (5 V/5 V) | IDD1 | 1.1 | 1.5 | mA | No load, 1 Mbps | 8 | |
| Supply Current IDD2 ADuM3201, 1 Mbps (5 V/5 V) | IDD2 | 1.3 | 1.8 | mA | No load, 1 Mbps | 8 | |
| Supply Current IDD1 ADuM3201, 10 Mbps (5 V/5 V) | IDD1 | 2.6 | 3.4 | mA | No load, 10 Mbps | 8 | |
| Supply Current IDD2 ADuM3201, 10 Mbps (5 V/5 V) | IDD2 | 3.1 | 4 | mA | No load, 10 Mbps | 8 | |
| Data Rate (3.3 V/3.3 V) | 10 | Mbps | WB Grade, within PWD limit | 9 | |||
| Propagation Delay (3.3 V/3.3 V) | tPHL, tPLH | 20 | 60 | ns | 50% input to 50% output | 9 | |
| Pulse Width Distortion ADuM3201 (3.3 V/3.3 V) | PWD | 4 | ns | /tPLH − tPHL/ | 9 | ||
| Pulse Width (3.3 V/3.3 V) | PW | 100 | ns | Within PWD limit | 9 | ||
| Propagation Delay Skew (3.3 V/3.3 V) | tPSK | 22 | ns | Between any two units | 9 | ||
| Channel Matching Codirectional (3.3 V/3.3 V) | tPSKCD | 3 | ns | 9 | |||
| Channel Matching Opposing-Direction (3.3 V/3.3 V) | tPSKOD | 22 | ns | 9 | |||
| Supply Current IDD1 ADuM3201, 1 Mbps (3.3 V/3.3 V) | IDD1 | 0.7 | 1.3 | mA | No load, 1 Mbps | 10 | |
| Supply Current IDD2 ADuM3201, 1 Mbps (3.3 V/3.3 V) | IDD2 | 0.8 | 1.6 | mA | No load, 1 Mbps | 10 | |
| Supply Current IDD1 ADuM3201, 10 Mbps (3.3 V/3.3 V) | IDD1 | 1.5 | 2.1 | mA | No load, 10 Mbps | 10 | |
| Supply Current IDD2 ADuM3201, 10 Mbps (3.3 V/3.3 V) | IDD2 | 1.9 | 2.4 | mA | No load, 10 Mbps | 10 | |
| Data Rate (5 V/3.3 V) | 10 | Mbps | WB Grade, within PWD limit | 10 | |||
| Propagation Delay (5 V/3.3 V) | tPHL, tPLH | 15 | 55 | ns | 50% input to 50% output | 10 | |
| Pulse Width Distortion (5 V/3.3 V) | PWD | 3 | ns | /tPLH − tPHL/ | 10 | ||
| Pulse Width (5 V/3.3 V) | PW | 100 | ns | Within PWD limit | 10 | ||
| Propagation Delay Skew (5 V/3.3 V) | tPSK | 22 | ns | Between any two units | 10 | ||
| Channel Matching Codirectional (5 V/3.3 V) | tPSKCD | 3 | ns | 10 | |||
| Channel Matching Opposing-Direction (5 V/3.3 V) | tPSKOD | 22 | ns | 11 | |||
| Supply Current IDD1 ADuM3201, 1 Mbps (5 V/3.3 V) | IDD1 | 1.1 | 1.5 | mA | No load, 1 Mbps | 11 | |
| Supply Current IDD2 ADuM3201, 1 Mbps (5 V/3.3 V) | IDD2 | 0.8 | 1.6 | mA | No load, 1 Mbps | 11 | |
| Supply Current IDD1 ADuM3201, 10 Mbps (5 V/3.3 V) | IDD1 | 2.6 | 3.4 | mA | No load, 10 Mbps | 11 | |
| Supply Current IDD2 ADuM3201, 10 Mbps (5 V/3.3 V) | IDD2 | 1.9 | 2.4 | mA | No load, 10 Mbps | 11 | |
| Data Rate (3.3 V/5 V) | 10 | Mbps | WB Grade, within PWD limit | 11 | |||
| Propagation Delay (3.3 V/5 V) | tPHL, tPLH | 15 | 55 | ns | 50% input to 50% output | 11 | |
| Pulse Width Distortion ADuM3201 (3.3 V/5 V) | PWD | 4 | ns | /tPLH − tPHL/ | 12 | ||
| Pulse Width (3.3 V/5 V) | PW | 100 | ns | Within PWD limit | 12 | ||
| Propagation Delay Skew (3.3 V/5 V) | tPSK | 22 | ns | Between any two units | 12 | ||
| Channel Matching Codirectional (3.3 V/5 V) | tPSKCD | 3 | ns | 12 | |||
| Channel Matching Opposing-Direction (3.3 V/5 V) | tPSKOD | 22 | ns | 12 | |||
| Supply Current IDD1 ADuM3201, 1 Mbps (3.3 V/5 V) | IDD1 | 0.7 | 1.3 | mA | No load, 1 Mbps | 12 | |
| Supply Current IDD2 ADuM3201, 1 Mbps (3.3 V/5 V) | IDD2 | 1.3 | 1.8 | mA | No load, 1 Mbps | 12 | |
| Supply Current IDD1 ADuM3201, 10 Mbps (3.3 V/5 V) | IDD1 | 1.5 | 2.1 | mA | No load, 10 Mbps | 12 | |
| Supply Current IDD2 ADuM3201, 10 Mbps (3.3 V/5 V) | IDD2 | 3.1 | 4 | mA | No load, 10 Mbps | 12 | |
| Logic Low Output Voltage (20 µA) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 9 | |
| Logic Low Output Voltage (3.2 mA) | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 9 | |
| Input Current per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDX | 9 |
| Common-Mode Transient Immunity | /CM/ | 25 | 35 | kV/µs | VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V | 9 | |
| Operating Temperature | TA | -40 | 125 | °C | ADuM3201WB | 15 | |
| Supply Voltage | VDD1, VDD2 | 3 | 5.5 | V | ADuM3201WB | 15 | |
| Maximum Input Signal Rise and Fall Times | 1 | ms | 15 | ||||
| Storage Temperature | TST | -55 | 150 | °C | 16 | ||
| Ambient Operating Temperature | TA | -40 | 125 | °C | 16 | ||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | Relative to respective ground | 16 | |
| Average Output Current, per Pin | IO | -22 | 22 | mA | 16 | ||
| Common-Mode Transients | CML, CMH | -100 | 100 | kV/µs | Across the insulation barrier | 16 | |
| IC Junction-to-Case Thermal Resistance, Side 1 | θJCI | 46 | °C/W | Thermocouple located at center of package underside | 13 | ||
| IC Junction-to-Case Thermal Resistance, Side 2 | θJCO | 41 | °C/W | 13 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM3200/ADuM3201 is proof-tested by applying an insulation test voltage ≥1050 VPEAK for 1 second (partial discharge detection limit = 5 pC). | 13 |
CAD (KiCad official)
- Symbol:
ADUM3201WBRZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adum3201wbrz-etched.step/adum3201wbrz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum3201wbrz.step/adum3201wbrz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
93c1a9b1b427e31c, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).