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ADUM3201BRZ-RL7

Analog Devices · Digital Isolators · SOIC-8

ADUM3201BRZ-RL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply Voltage for Isolator Side 1, operating from 3.0 V to 5.5 V relative to GND1 (absolute maximum −0.5 V to +7.0 V).
2 VOA output Logic Output A, with output voltage limited to −0.5 V to VDDO + 0.5 V and average output current limited to −22 mA to +22 mA per pin.
3 VIB input Logic Input B, with input voltage limited to −0.5 V to VDDI + 0.5 V.
4 GND1 power_in Ground 1, the ground reference for Isolator Side 1.
5 GND2 power_in Ground 2, the ground reference for Isolator Side 2.
6 VOB output Logic Output B, with output voltage limited to −0.5 V to VDDO + 0.5 V and average output current limited to −22 mA to +22 mA per pin.
7 VIA input Logic Input A, with input voltage limited to −0.5 V to VDDI + 0.5 V.
8 VDD2 power_in Supply Voltage for Isolator Side 2, operating from 3.0 V to 5.5 V relative to GND2 (absolute maximum −0.5 V to +7.0 V).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature (ADuM3201B, 105°C grade) TA -40 105 °C 13
Supply Voltages (ADuM3201B) VDD1, VDD2 3 5.5 V 13
Maximum Input Signal Rise and Fall Times 1 ms 13
Storage Temperature TST -55 150 °C 14
Ambient Operating Temperature TA -40 125 °C 14
Supply Voltages VDD1, VDD2 -0.5 7 V Relative to respective ground 14
Input Voltage (upper limit printed as VDDI + 0.5 V) VIA, VIB -0.5 V Relative to ground; upper limit VDDI + 0.5 V not numeric 14
Output Voltage (upper limit printed as VDDO + 0.5 V) VOA, VOB -0.5 V Relative to ground; upper limit VDDO + 0.5 V not numeric 14
Average Output Current, per Pin IO -22 22 mA See Figure 3 for derating with temperature 14
Common-Mode Transients CML, CMH -100 100 kV/µs Across insulation barrier 14
Propagation Delay (5 V, 105°C, B grade) tPHL, tPLH 20 50 ns 50% input to 50% output 4
Pulse Width Distortion (B grade) PWD 3 ns /tPLH − tPHL/ 4
Pulse Width (B grade) PW 100 ns Within PWD limit 4
Propagation Delay Skew (B grade) tPSK 15 ns Between any two units 4
Channel Matching Codirectional (B grade) tPSKCD 3 ns 4
Channel Matching Opposing-Direction (B grade) tPSKOD 15 ns 4
Output Rise/Fall Time (B grade) tR/tF 2.5 ns 10% to 90% 4
Data Rate (B grade) 10 Mbps Within PWD limit 4
Input Current per Channel II -10 0.01 10 µA 0 V ≤VIx ≤ VDDX 4
Logic Low Output Voltage (20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 4
Logic Low Output Voltage (3.2 mA) VOL 0.2 0.4 V IOx = 3.2 mA, VIx = VIxL 4
Quiescent Input Supply Current per Channel IDDI(Q) 0.4 0.8 mA VIA = VIB = 0 V 4
Quiescent Output Supply Current per Channel IDDO(Q) 0.5 0.6 mA VIA = VIB = 0 V 4
Common-Mode Transient Immunity /CM/ 25 35 kV/µs VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V 4
Propagation Delay (3.3 V, 105°C, B grade) tPHL, tPLH 20 60 ns 50% input to 50% output 5
Pulse Width Distortion ADuM3201 (B grade) PWD 4 ns /tPLH − tPHL/ 5
Pulse Width (B grade) PW 100 ns Within PWD limit 5
Propagation Delay Skew (B grade) tPSK 22 ns Between any two units 5
Channel Matching Codirectional (B grade) tPSKCD 3 ns 5
Channel Matching Opposing-Direction (B grade) tPSKOD 22 ns 5
Output Rise/Fall Time (B grade) tR/tF 3 ns 10% to 90% 5
Data Rate (B grade) 10 Mbps Within PWD limit 5
Input Current per Channel II -10 0.01 10 µA 0 V ≤VIx ≤ VDDX 5
Logic Low Output Voltage (20 µA) VOL 0 0.1 V IOx = 20 µA, VIx = VIxL 5
Logic Low Output Voltage (3.2 mA) VOL 0.2 0.4 V IOx = 3.2 mA, VIx = VIxL 5
Quiescent Input Supply Current per Channel IDDI(Q) 0.3 0.5 mA VIA = VIB = 0 V 5
Quiescent Output Supply Current per Channel IDDO(Q) 0.3 0.5 mA VIA = VIB = 0 V 5
Common-Mode Transient Immunity /CM/ 25 35 kV/µs VIx = VDDX, VCM = 1000 V, transient magnitude = 800 V 5
Thermal Resistance, Junction-to-Case Side 1 θJCI 46 °C/W Thermocouple located at center of package underside 12
Thermal Resistance, Junction-to-Case Side 2 θJCO 41 °C/W 12

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC limit = 5 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM3200/ADuM3201 is proof-tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection limit = 5 12

CAD (KiCad official)

  • Symbol: ADUM3201BRZ-RL7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adum3201brz-rl7-etched.step / adum3201brz-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum3201brz-rl7.step / adum3201brz-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 841b0bf0b5f79b0a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF