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ADUM2400CRWZ-RL

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Analog Devices Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADUM2400CRWZ-RL

Analog Devices · Digital Isolators · SOIC-16-300mil

ADUM2400CRWZ-RL from Analog Devices, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, 2.7 V to 5.5 V.
2 GND1 power_in Ground reference for isolator side 1; pin 2 and pin 8 are internally connected and connecting both to GND1 is recommended.
3 VIA input Logic input A on side 1, with logic high threshold 2.0 V and logic low threshold 0.8 V.
4 VIB input Logic input B on side 1, with logic high threshold 2.0 V and logic low threshold 0.8 V.
5 VIC input Logic input C on side 1, with logic high threshold 2.0 V and logic low threshold 0.8 V.
6 VID input Logic input D on side 1, with logic high threshold 2.0 V and logic low threshold 0.8 V.
7 NC unconnected No connect.
8 GND1 power_in Ground reference for isolator side 1; internally connected to pin 2, and connecting both to GND1 is recommended.
9 GND2 power_in Ground reference for isolator side 2; pin 9 and pin 15 are internally connected and connecting both to GND2 is recommended.
10 VE2 input Output enable 2, active high; VOA, VOB, VOC and VOD are enabled when VE2 is high or disconnected and disabled when low, and connecting it to an external logic high or low is recommended in noisy environments.
11 VOD output Logic output D on side 2.
12 VOC output Logic output C on side 2.
13 VOB output Logic output B on side 2.
14 VOA output Logic output A on side 2.
15 GND2 power_in Ground reference for isolator side 2; internally connected to pin 9, and connecting both to GND2 is recommended.
16 VDD2 power_in Supply voltage for isolator side 2, 2.7 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Pulse Width (5 V operation, CRWZ) PW 8.3 11.1 ns CL = 15 pF, CMOS signal levels 4
Maximum Data Rate (5 V operation, CRWZ) 90 120 Mbps CL = 15 pF, CMOS signal levels 4
Propagation Delay (5 V operation, CRWZ) tPHL, tPLH 18 27 32 ns CL = 15 pF, CMOS signal levels 4
Pulse Width Distortion (5 V operation, CRWZ) PWD 0.5 2 ns CL = 15 pF, CMOS signal levels 4
Propagation Delay Skew (5 V operation, CRWZ) tPSK 10 ns CL = 15 pF, CMOS signal levels 4
Channel-to-Channel Matching, Codirectional Channels (5 V operation, CRWZ) tPSKCD 2 ns CL = 15 pF, CMOS signal levels 4
Channel-to-Channel Matching, Opposing-Directional Channels (5 V operation, CRWZ) tPSKOD 5 ns CL = 15 pF, CMOS signal levels 4
Common-Mode Transient Immunity at Logic High Output (5 V operation) /CMH/ 25 35 kV/µs VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V 4
Common-Mode Transient Immunity at Logic Low Output (5 V operation) /CML/ 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 4
Minimum Pulse Width (3 V operation, CRWZ) PW 8.3 11.1 ns CL = 15 pF, CMOS signal levels 6
Maximum Data Rate (3 V operation, CRWZ) 90 120 Mbps CL = 15 pF, CMOS signal levels 6
Propagation Delay (3 V operation, CRWZ) tPHL, tPLH 20 34 45 ns CL = 15 pF, CMOS signal levels 6
Pulse Width Distortion (3 V operation, CRWZ) PWD 0.5 2 ns CL = 15 pF, CMOS signal levels 6
Propagation Delay Skew (3 V operation, CRWZ) tPSK 16 ns CL = 15 pF, CMOS signal levels 6
Channel-to-Channel Matching, Codirectional Channels (3 V operation, CRWZ) tPSKCD 2 ns CL = 15 pF, CMOS signal levels 6
Channel-to-Channel Matching, Opposing-Directional Channels (3 V operation, CRWZ) tPSKOD 5 ns CL = 15 pF, CMOS signal levels 6
Common-Mode Transient Immunity at Logic High Output (3 V operation) /CMH/ 25 35 kV/µs VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V 6
Common-Mode Transient Immunity at Logic Low Output (3 V operation) /CML/ 25 35 kV/µs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V 6
Input Currents (5 V operation) IIA, IIB, IIC, IID, IE1, IE2 -10 0.01 10 µA 0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2, 0 V ≤ VE1, VE2 ≤ VDD1 or VDD2 3
Input Currents (3 V operation) IIA, IIB, IIC, IID, IE1, IE2 -10 0.01 10 µA 0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2, 0 V ≤ VE1, VE2 ≤ VDD1 or VDD2 5
Logic High Input Threshold (5 V operation) VIH, VEH 2 V 3
Logic Low Input Threshold (5 V operation) VIL, VEL 0.8 V 3
Logic High Input Threshold (3 V operation) VIH, VEH 1.6 V 5
Logic Low Input Threshold (3 V operation) VIL, VEL 0.4 V 5
Logic Low Output Voltage (5 V operation) VOAL, VOBL, VOCL, VODL 0 0.1 V IOx = 20 µA, VIx = VIxL 3
Logic Low Output Voltage (5 V operation) VOAL, VOBL, VOCL, VODL 0.2 0.4 V IOx = 4 mA, VIx = VIxL 3
Logic Low Output Voltage (3 V operation) VOAL, VOBL, VOCL, VODL 0 0.1 V IOx = 20 µA, VIx = VIxL 5
Logic Low Output Voltage (3 V operation) VOAL, VOBL, VOCL, VODL 0.2 0.4 V IOx = 4 mA, VIx = VIxL 5
Input Supply Current per Channel, Quiescent (5 V operation) IDDI (Q) 0.5 0.53 mA 3
Output Supply Current per Channel, Quiescent (5 V operation) IDDO (Q) 0.19 0.21 mA 3
ADuM2400 VDD1 Supply Current, DC to 2 Mbps (5 V operation) IDD1 (Q) 2.2 2.8 mA DC to 1 MHz logic signal frequency 3
ADuM2400 VDD2 Supply Current, DC to 2 Mbps (5 V operation) IDD2 (Q) 0.9 1.4 mA DC to 1 MHz logic signal frequency 3
ADuM2400 VDD1 Supply Current, 10 Mbps (5 V operation) IDD1 (10) 8.6 10.6 mA 5 MHz logic signal frequency 3
ADuM2400 VDD2 Supply Current, 10 Mbps (5 V operation) IDD2 (10) 2.6 3.5 mA 5 MHz logic signal frequency 3
ADuM2400 VDD1 Supply Current, 90 Mbps (5 V operation) IDD1 (90) 70 100 mA 45 MHz logic signal frequency 3
ADuM2400 VDD2 Supply Current, 90 Mbps (5 V operation) IDD2 (90) 18 25 mA 45 MHz logic signal frequency 3
Input Supply Current per Channel, Quiescent (3 V operation) IDDI (Q) 0.26 0.31 mA 5
Output Supply Current per Channel, Quiescent (3 V operation) IDDO (Q) 0.11 0.14 mA 5
ADuM2400 VDD1 Supply Current, DC to 2 Mbps (3 V operation) IDD1 (Q) 1.2 1.9 mA DC to 1 MHz logic signal frequency 5
ADuM2400 VDD2 Supply Current, DC to 2 Mbps (3 V operation) IDD2 (Q) 0.5 0.9 mA DC to 1 MHz logic signal frequency 5
ADuM2400 VDD1 Supply Current, 10 Mbps (3 V operation) IDD1 (10) 4.5 6.5 mA 5 MHz logic signal frequency 5
ADuM2400 VDD2 Supply Current, 10 Mbps (3 V operation) IDD2 (10) 1.4 2 mA 5 MHz logic signal frequency 5
ADuM2400 VDD1 Supply Current, 90 Mbps (3 V operation) IDD1 (90) 37 65 mA 45 MHz logic signal frequency 5
ADuM2400 VDD2 Supply Current, 90 Mbps (3 V operation) IDD2 (90) 11 15 mA 45 MHz logic signal frequency 5
Logic High Output Voltage, IOx = −20 µA (5 V operation) VOAH, VOBH, VOCH, VODH 5 V IOx = −20 µA, VIx = VIxH 3
Logic High Output Voltage, IOx = −4 mA (5 V operation) VOAH, VOBH, VOCH, VODH 4.8 V IOx = −4 mA, VIx = VIxH 3
Logic High Output Voltage, IOx = −20 µA (3 V operation) VOAH, VOBH, VOCH, VODH 3 V IOx = −20 µA, VIx = VIxH 5
Logic High Output Voltage, IOx = −4 mA (3 V operation) VOAH, VOBH, VOCH, VODH 2.8 V IOx = −4 mA, VIx = VIxH 5
Storage Temperature Range TST -65 150 °C 12
Supply Voltage Range VDD1, VDD2 -0.5 7 V All voltages relative to their respective ground 12
Input Voltage Range VIA, VIB, VIC, VID, VE1, VE2 -0.5 V Relative to ground; upper limit is VDDI + 0.5 V 12
Output Voltage Range VOA, VOB, VOC, VOD -0.5 V Relative to ground; upper limit is VDDO + 0.5 V 12
Average Output Current Per Pin, Side 1 IO1 -18 18 mA 12
Average Output Current Per Pin, Side 2 IO2 -22 22 mA 12
Common-Mode Transients -100 100 kV/µs Refers to common-mode transients across the insulation barrier 12
Operating Temperature TA -40 105 °C 11
Supply Voltages VDD1, VDD2 2.7 5.5 V All voltages relative to their respective ground 11
Input Signal Rise and Fall Times 1 ms 11
IC Junction-to-Case Thermal Resistance, Side 1 θJCI 33 °C/W Thermocouple located at center of package underside 10
IC Junction-to-Case Thermal Resistance, Side 2 θJCO 28 °C/W Thermocouple located at center of package underside 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC detection limit = 10 µA). 2 In accordance with DIN V VDE V 0884-10, each ADuM2400/ADuM2401/ADuM2402 is proof tested by applying an insulation test voltage ≥1590 V peak for 1 sec (partial discharge det 10

CAD (KiCad official)

  • Symbol: ADUM2400CRWZ-RL
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: adum2400crwz-rl-etched.step / adum2400crwz-rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum2400crwz-rl.step / adum2400crwz-rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 0b0077603f231152, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF