component
ADUM1441ARQZ
Public Made by Adomby adom
Analog Devices Digital Isolators, QSOP-16-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADUM1441ARQZ
Analog Devices · Digital Isolators · QSOP-16-150mil
ADUM1441ARQZ from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, 2.25 V to 3.6 V; connect a ceramic bypass capacitor in the 0.01 µF to 0.1 µF range between VDD1 (pin 1) and GND1 (pin 2). |
| 2 | GND1 | power_in | Ground reference for isolator side 1; pin 2 and pin 8 are internally connected, and connecting both to GND1 is recommended. |
| 3 | VIA | input | Logic input A on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 4 | VIB | input | Logic input B on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 5 | VIC | input | Logic input C on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 6 | VOD | output | Logic output D on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 7 | EN1 | input | Refresh/watchdog enable for side 1: tying to GND1 enables refresh and watchdog functionality, while tying to VDD1 disables them for lowest power operation; EN1 and EN2 must be set to the same logic state. |
| 8 | GND1 | power_in | Ground 1 pin, internally connected to pin 2; connecting both pins to GND1 is recommended. |
| 9 | GND2 | power_in | Ground reference for isolator side 2; pin 9 and pin 15 are internally connected, and connecting both to GND2 is recommended. |
| 10 | EN2 | input | Refresh/watchdog enable for side 2: tying to GND2 enables refresh and watchdog functionality, while tying to VDD2 disables them for lowest power operation; EN1 and EN2 must be set to the same logic state. |
| 11 | VID | input | Logic input D on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 12 | VOC | output | Logic output C on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 13 | VOB | output | Logic output B on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 14 | VOA | output | Logic output A on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 15 | GND2 | power_in | Ground 2 pin, internally connected to pin 9; connecting both pins to GND2 is recommended. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, 2.25 V to 3.6 V; connect a ceramic bypass capacitor in the 0.01 µF to 0.1 µF range between VDD2 (pin 16) and GND2 (pin 15). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QSOP-16-150mil |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Current Side 1, 3.3 V operation (ADuM1441) | IDD1 | 672 | 900 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 4 | |
| Supply Current Side 2, 3.3 V operation (ADuM1441) | IDD2 | 552 | 900 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 4 | |
| Supply Current Side 1, 2.5 V operation (ADuM1441) | IDD1 | 552 | 750 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 6 | |
| Supply Current Side 2, 2.5 V operation (ADuM1441) | IDD2 | 409 | 750 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 6 | |
| Supply Current Side 1, VDD1 = 3.3 V / VDD2 = 2.5 V (ADuM1441) | IDD1 | 672 | 900 | µA | VDD1 = 3.3 V, VDD2 = 2.5 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 7 | |
| Supply Current Side 2, VDD1 = 3.3 V / VDD2 = 2.5 V (ADuM1441) | IDD2 | 409 | 750 | µA | VDD1 = 3.3 V, VDD2 = 2.5 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 7 | |
| Supply Current Side 1, VDD1 = 2.5 V / VDD2 = 3.3 V (ADuM1441) | IDD1 | 552 | 750 | µA | VDD1 = 2.5 V, VDD2 = 3.3 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 8 | |
| Supply Current Side 2, VDD1 = 2.5 V / VDD2 = 3.3 V (ADuM1441) | IDD2 | 552 | 900 | µA | VDD1 = 2.5 V, VDD2 = 3.3 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 8 | |
| Quiescent Current Input Supply, 3.3 V | IDDI (Q) | 4.8 | 10 | µA | ENX low | 5 | |
| Quiescent Current Output Supply, 3.3 V | IDDO (Q) | 0.8 | 3.3 | µA | ENX low | 5 | |
| Quiescent Current Input Supply, 2.5 V | IDDI (Q) | 2.6 | 3.3 | µA | ENX low | 6 | |
| Quiescent Current Output Supply, 2.5 V | IDDO (Q) | 0.5 | 1.8 | µA | ENX low | 6 | |
| Common-Mode Transient Immunity, 3.3 V | /CM/ | 25 | 40 | kV/µs | VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V | 5 | |
| Common-Mode Transient Immunity, 2.5 V | /CM/ | 25 | 40 | kV/µs | VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V | 6 | |
| Input Current per Channel, 3.3 V | II | -1 | 0.01 | 1 | µA | 0 V ≤ VIx ≤ VDDx1 | 4 |
| Input Current per Channel, 2.5 V | II | -1 | 0.01 | 1 | µA | 0 V ≤ VIx ≤ VDDx1 | 6 |
| Propagation Delay, 3.3 V operation | tPHL, tPLH | 80 | 180 | ns | 50% input to 50% output | 4 | |
| Propagation Delay, 2.5 V operation | tPHL, tPLH | 112 | 180 | ns | 50% input to 50% output | 5 | |
| Propagation Delay Side 1 to Side 2, VDD1 = 3.3 V / VDD2 = 2.5 V | tPHL, tPLH | 84 | 180 | ns | 50% input to 50% output | 7 | |
| Propagation Delay Side 2 to Side 1, VDD1 = 3.3 V / VDD2 = 2.5 V | tPHL, tPLH | 120 | 180 | ns | 50% input to 50% output | 7 | |
| Propagation Delay Side 1 to Side 2, VDD1 = 2.5 V / VDD2 = 3.3 V | tPHL, tPLH | 120 | 180 | ns | 50% input to 50% output | 7 | |
| Propagation Delay Side 2 to Side 1, VDD1 = 2.5 V / VDD2 = 3.3 V | tPHL, tPLH | 84 | 180 | ns | 50% input to 50% output | 7 | |
| IC Junction-to-Ambient Thermal Resistance (QSOP) | θJA | 76 | °C/W | Thermocouple located at center of package underside | 8 | ||
| Supply Voltages (absolute maximum) | VDD1, VDD2 | -0.5 | 5 | V | TA = 25°C, unless otherwise noted | 14 | |
| Input Voltages (absolute maximum) | VIA, VIB | -0.5 | V | TA = 25°C, unless otherwise noted | 14 | ||
| Output Voltages (absolute maximum) | VOA, VOB | -0.5 | V | TA = 25°C, unless otherwise noted | 14 | ||
| Average Output Current per Pin, Side 1 | IO1 | -10 | 10 | mA | TA = 25°C, unless otherwise noted | 14 | |
| Average Output Current per Pin, Side 2 | IO2 | -10 | 10 | mA | TA = 25°C, unless otherwise noted | 14 | |
| Common-Mode Transients (absolute maximum) | -100 | 100 | kV/µs | TA = 25°C, unless otherwise noted | 14 | ||
| Storage Temperature Range | TST | -65 | 150 | °C | TA = 25°C, unless otherwise noted | 14 | |
| Ambient Operating Temperature Range (absolute maximum) | TA | -40 | 125 | °C | TA = 25°C, unless otherwise noted | 14 | |
| Operating Temperature | TA | -40 | 125 | °C | 13 | ||
| Supply Voltages | VDD1, VDD2 | 2.25 | 3.6 | V | All voltages relative to their respective grounds | 13 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | insulation test voltage ≥1059 Vpeak for 1 second (partial discharge detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-17 | 9 |
CAD (KiCad official)
- Symbol:
ADUM1441ARQZ - Footprint:
Package_SO:QSOP-16_3.9x4.9mm_P0.635mm - 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files:
adum1441arqz-etched.step/adum1441arqz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum1441arqz.step/adum1441arqz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (25 pp, sha256
a2c66aaf1a60f811, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADUM1441ARQZ
**Analog Devices** · Digital Isolators · QSOP-16-150mil
ADUM1441ARQZ from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, 2.25 V to 3.6 V; connect a ceramic bypass capacitor in the 0.01 µF to 0.1 µF range between VDD1 (pin 1) and GND1 (pin 2). |
| 2 | GND1 | power_in | Ground reference for isolator side 1; pin 2 and pin 8 are internally connected, and connecting both to GND1 is recommended. |
| 3 | VIA | input | Logic input A on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 4 | VIB | input | Logic input B on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 5 | VIC | input | Logic input C on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 6 | VOD | output | Logic output D on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 7 | EN1 | input | Refresh/watchdog enable for side 1: tying to GND1 enables refresh and watchdog functionality, while tying to VDD1 disables them for lowest power operation; EN1 and EN2 must be set to the same logic state. |
| 8 | GND1 | power_in | Ground 1 pin, internally connected to pin 2; connecting both pins to GND1 is recommended. |
| 9 | GND2 | power_in | Ground reference for isolator side 2; pin 9 and pin 15 are internally connected, and connecting both to GND2 is recommended. |
| 10 | EN2 | input | Refresh/watchdog enable for side 2: tying to GND2 enables refresh and watchdog functionality, while tying to VDD2 disables them for lowest power operation; EN1 and EN2 must be set to the same logic state. |
| 11 | VID | input | Logic input D on side 1; the input voltage is limited to −0.5 V to VDDI + 0.5 V per the absolute maximum ratings. |
| 12 | VOC | output | Logic output C on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 13 | VOB | output | Logic output B on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 14 | VOA | output | Logic output A on side 2; the output voltage is limited to −0.5 V to VDD2 + 0.5 V per the absolute maximum ratings. |
| 15 | GND2 | power_in | Ground 2 pin, internally connected to pin 9; connecting both pins to GND2 is recommended. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, 2.25 V to 3.6 V; connect a ceramic bypass capacitor in the 0.01 µF to 0.1 µF range between VDD2 (pin 16) and GND2 (pin 15). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QSOP-16-150mil |
| Category | Interface ICs |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Current Side 1, 3.3 V operation (ADuM1441) | IDD1 | | 672 | 900 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 4 |
| Supply Current Side 2, 3.3 V operation (ADuM1441) | IDD2 | | 552 | 900 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 4 |
| Supply Current Side 1, 2.5 V operation (ADuM1441) | IDD1 | | 552 | 750 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 6 |
| Supply Current Side 2, 2.5 V operation (ADuM1441) | IDD2 | | 409 | 750 | µA | 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 6 |
| Supply Current Side 1, VDD1 = 3.3 V / VDD2 = 2.5 V (ADuM1441) | IDD1 | | 672 | 900 | µA | VDD1 = 3.3 V, VDD2 = 2.5 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 7 |
| Supply Current Side 2, VDD1 = 3.3 V / VDD2 = 2.5 V (ADuM1441) | IDD2 | | 409 | 750 | µA | VDD1 = 3.3 V, VDD2 = 2.5 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 7 |
| Supply Current Side 1, VDD1 = 2.5 V / VDD2 = 3.3 V (ADuM1441) | IDD1 | | 552 | 750 | µA | VDD1 = 2.5 V, VDD2 = 3.3 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 8 |
| Supply Current Side 2, VDD1 = 2.5 V / VDD2 = 3.3 V (ADuM1441) | IDD2 | | 552 | 900 | µA | VDD1 = 2.5 V, VDD2 = 3.3 V; 2 Mbps, no load; ENX = 0 V, VIH = VDD, VIL = 0 V | 8 |
| Quiescent Current Input Supply, 3.3 V | IDDI (Q) | | 4.8 | 10 | µA | ENX low | 5 |
| Quiescent Current Output Supply, 3.3 V | IDDO (Q) | | 0.8 | 3.3 | µA | ENX low | 5 |
| Quiescent Current Input Supply, 2.5 V | IDDI (Q) | | 2.6 | 3.3 | µA | ENX low | 6 |
| Quiescent Current Output Supply, 2.5 V | IDDO (Q) | | 0.5 | 1.8 | µA | ENX low | 6 |
| Common-Mode Transient Immunity, 3.3 V | /CM/ | 25 | 40 | | kV/µs | VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V | 5 |
| Common-Mode Transient Immunity, 2.5 V | /CM/ | 25 | 40 | | kV/µs | VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V | 6 |
| Input Current per Channel, 3.3 V | II | -1 | 0.01 | 1 | µA | 0 V ≤ VIx ≤ VDDx1 | 4 |
| Input Current per Channel, 2.5 V | II | -1 | 0.01 | 1 | µA | 0 V ≤ VIx ≤ VDDx1 | 6 |
| Propagation Delay, 3.3 V operation | tPHL, tPLH | | 80 | 180 | ns | 50% input to 50% output | 4 |
| Propagation Delay, 2.5 V operation | tPHL, tPLH | | 112 | 180 | ns | 50% input to 50% output | 5 |
| Propagation Delay Side 1 to Side 2, VDD1 = 3.3 V / VDD2 = 2.5 V | tPHL, tPLH | | 84 | 180 | ns | 50% input to 50% output | 7 |
| Propagation Delay Side 2 to Side 1, VDD1 = 3.3 V / VDD2 = 2.5 V | tPHL, tPLH | | 120 | 180 | ns | 50% input to 50% output | 7 |
| Propagation Delay Side 1 to Side 2, VDD1 = 2.5 V / VDD2 = 3.3 V | tPHL, tPLH | | 120 | 180 | ns | 50% input to 50% output | 7 |
| Propagation Delay Side 2 to Side 1, VDD1 = 2.5 V / VDD2 = 3.3 V | tPHL, tPLH | | 84 | 180 | ns | 50% input to 50% output | 7 |
| IC Junction-to-Ambient Thermal Resistance (QSOP) | θJA | | 76 | | °C/W | Thermocouple located at center of package underside | 8 |
| Supply Voltages (absolute maximum) | VDD1, VDD2 | -0.5 | | 5 | V | TA = 25°C, unless otherwise noted | 14 |
| Input Voltages (absolute maximum) | VIA, VIB | -0.5 | | | V | TA = 25°C, unless otherwise noted | 14 |
| Output Voltages (absolute maximum) | VOA, VOB | -0.5 | | | V | TA = 25°C, unless otherwise noted | 14 |
| Average Output Current per Pin, Side 1 | IO1 | -10 | | 10 | mA | TA = 25°C, unless otherwise noted | 14 |
| Average Output Current per Pin, Side 2 | IO2 | -10 | | 10 | mA | TA = 25°C, unless otherwise noted | 14 |
| Common-Mode Transients (absolute maximum) | | -100 | | 100 | kV/µs | TA = 25°C, unless otherwise noted | 14 |
| Storage Temperature Range | TST | -65 | | 150 | °C | TA = 25°C, unless otherwise noted | 14 |
| Ambient Operating Temperature Range (absolute maximum) | TA | -40 | | 125 | °C | TA = 25°C, unless otherwise noted | 14 |
| Operating Temperature | TA | -40 | | 125 | °C | | 13 |
| Supply Voltages | VDD1, VDD2 | 2.25 | | 3.6 | V | All voltages relative to their respective grounds | 13 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | | insulation test voltage ≥1059 Vpeak for 1 second (partial discharge detection limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-17 | 9 |
## CAD (KiCad official)
- Symbol: `ADUM1441ARQZ`
- Footprint: `Package_SO:QSOP-16_3.9x4.9mm_P0.635mm`
- 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files: `adum1441arqz-etched.step` / `adum1441arqz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adum1441arqz.step` / `adum1441arqz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/adum1440-1441-1442-1445-1446-1447.pdf) (25 pp, sha256 `a2c66aaf1a60f811`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adum1441arqz-datasheet.pdf)