ADUM142D1BRZ from Analog Devices, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD1	power_in	Supply voltage for isolator side 1; the datasheet recommends a 0.01 µF to 0.1 µF bypass capacitor between Pin 1 and Pin 2.
2	GND1	power_in	Ground reference for isolator side 1.
3	VIA	input	Logic input A (side 1).
4	VIB	input	Logic input B (side 1).
5	VOC	output	Logic output C (side 2); disabled to high-Z when VE1 is low.
6	VOD	output	Logic output D (side 2); disabled to high-Z when VE1 is low.
7	DISABLE1	input	Input disable 1; disables the isolator inputs, and outputs take the logic state set by the fail-safe option in the Ordering Guide.
8	GND1	power_in	Ground reference for isolator side 1.
9	GND2	power_in	Ground reference for isolator side 2.
10	DISABLE2	input	Input disable 2; disables the isolator inputs, and outputs take the logic state set by the fail-safe option in the Ordering Guide.
11	VID	input	Logic input D (side 2).
12	VIC	input	Logic input C (side 2).
13	VOB	output	Logic output B (side 2); disabled to high-Z when VE2 is low.
14	VOA	output	Logic output A (side 2); disabled to high-Z when VE2 is low.
15	GND2	power_in	Ground reference for isolator side 2.
16	VDD2	power_in	Supply voltage for isolator side 2; the datasheet recommends a 0.01 µF to 0.1 µF bypass capacitor between Pin 15 and Pin 16.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-16
Category	Communication Interface Chip/UART/485/232
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Propagation Delay	tPHL, tPLH	4.8	7.2	13	ns	50% input to 50% output	4
Pulse Width Distortion	PWD		0.5	3	ns	/tPLH − tPHL/	4
Channel Matching, Codirectional	tPSKCD		0.5	3	ns		4
Channel Matching, Opposing Direction	tPSKOD		0.5	3	ns		4
Input Current per Channel	II	-10	0.01	10	µA	0 V ≤ VIx ≤ VDDx	4
Tristate Output Current per Channel	IOZ	-10	0.01	10	µA	0 V ≤ VOx ≤ VDDx	4
Logic Low Output Voltage (5 V operation)	VOL		0	0.1	V	IOx = 20 µA, VIx = VIxL	4
Logic Low Output Voltage (5 V operation)	VOL		0.2	0.4	V	IOx = 4 mA, VIx = VIxL	4
Quiescent Supply Current, Side 1 (5 V operation)	IDD1 (Q)		1.6	2.46	mA	VI5 = 0 (E0, D0), 1 (E1, D1)	4
Quiescent Supply Current, Side 2 (5 V operation)	IDD2 (Q)		1.6	2.46	mA	VI5 = 0 (E0, D0), 1 (E1, D1)	4
Quiescent Supply Current, Side 1 (5 V operation)	IDD1 (Q)		7.2	11.5	mA	VI5 = 1 (E0, D0), 0 (E1, D1)	4
Quiescent Supply Current, Side 2 (5 V operation)	IDD2 (Q)		8.4	11.5	mA	VI5 = 1 (E0, D0), 0 (E1, D1)	5
Operating Temperature	TA	-40		125	°C		17
Supply Voltages	VDD1, VDD2	1.7		5.5	V		17
Input Signal Rise and Fall Times				1	ms		17
Storage Temperature Range	TST	-65		150	°C		18
Ambient Operating Temperature Range	TA	-40		125	°C		18
Maximum Fault Junction Temperature per DIN V VDE V 0884-11	TJ			150	°C		18
Maximum Fault Junction Temperature per Mold Compound	TJ			300	°C		18
Supply Voltages	VDD1, VDD2	-0.5		7	V		18
Input Voltages	VIA, VIB, VIC, VID, VE1, VE2, DISABLE1, DISABLE2	-0.5			V	Maximum is VDDI1 + 0.5 V	18
Output Voltages	VOA, VOB, VOC, VOD	-0.5			V	Maximum is VDDO2 + 0.5 V	18
Average Output Current per Pin, Side 1	IO1	-10		10	mA		18
Average Output Current per Pin, Side 2	IO2	-10		10	mA		18
Common-Mode Transients		-150		150	kV/μs	Across the insulation barrier	18
IC Junction to Ambient Thermal Resistance, R-16 Narrow Body [SOIC_N] Package	θJA		76		°C/W	Thermocouple located at center of package underside	13

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	pC		In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the R-16 narrow body [SOIC_N] package is proof tested by applying an insulation test	14

CAD (KiCad official)

Symbol: ADUM142D1BRZ
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: adum142d1brz-etched.step / adum142d1brz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum142d1brz.step / adum142d1brz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (31 pp, sha256 d8dc27340f57bada, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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ADUM142D1BRZ

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3D Model

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