component
ADUM140E0BRQZ
Public Made by Adomby adom
Analog Devices Digital Isolators, QSOP-16-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADUM140E0BRQZ
Analog Devices · Digital Isolators · QSOP-16-150mil
ADUM140E0BRQZ from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, with a 0.01 µF to 0.1 µF bypass capacitor recommended between pin 1 and pin 2. |
| 2 | GND1 | power_in | Ground reference for isolator side 1, shorted internally with pin 8 on the same side. |
| 3 | VIA | input | Logic input A on side 1. |
| 4 | VIB | input | Logic input B on side 1. |
| 5 | VIC | input | Logic input C on side 1. |
| 6 | VID | input | Logic input D on side 1. |
| 7 | NIC | unconnected | No internal connection; leave this pin floating. |
| 8 | GND1 | power_in | Ground reference for isolator side 1, second ground pin of side 1. |
| 9 | GND2 | power_in | Ground reference for isolator side 2, second ground pin of side 2. |
| 10 | VE2 | input | Active-high output enable 2: outputs VOA, VOB, VOC and VOD are enabled when VE2 is high or disconnected, and go to high-Z when VE2 is low. |
| 11 | VOD | output | Logic output D on side 2. |
| 12 | VOC | output | Logic output C on side 2. |
| 13 | VOB | output | Logic output B on side 2. |
| 14 | VOA | output | Logic output A on side 2. |
| 15 | GND2 | power_in | Ground reference for isolator side 2, with a bypass capacitor recommended between pin 15 and pin 16. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, with a 0.01 µF to 0.1 µF bypass capacitor recommended between pin 15 and pin 16. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QSOP-16-150mil |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Pulse Width | PW | 6.6 | ns | Within pulse width distortion (PWD) limit | 4 | ||
| Data Rate | 150 | Mbps | Within PWD limit | 4 | |||
| Propagation Delay (5 V) | tPHL, tPLH | 4.8 | 7.2 | 13 | ns | 50% input to 50% output | 4 |
| Pulse Width Distortion (5 V) | PWD | 0.5 | 3 | ns | /tPLH − tPHL/ | 4 | |
| Propagation Delay Skew (5 V) | tPSK | 6.1 | ns | Between any two units at the same temperature, voltage, and load | 4 | ||
| Channel Matching Codirectional (5 V) | tPSKCD | 0.5 | 3 | ns | 4 | ||
| Channel Matching Opposing Direction (5 V) | tPSKOD | 0.5 | 3 | ns | 4 | ||
| Logic Low Output Voltage (5 V) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 4 | |
| Logic Low Output Voltage (5 V) | VOL | 0.2 | 0.4 | V | IOx = 4 mA, VIx = VIxL | 4 | |
| Input Current per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 4 |
| VE2 Enable Input Pull-Up Current | IPU | -10 | -3 | µA | VE2 = 0 V | 4 | |
| Tristate Output Current per Channel | IOZ | -10 | 0.01 | 10 | µA | 0 V ≤ VOx ≤ VDDx | 4 |
| Quiescent Supply Current Side 1 (5 V) | IDD1 (Q) | 1.2 | 2.2 | mA | VI = 0 (E0) | 4 | |
| Quiescent Supply Current Side 2 (5 V) | IDD2 (Q) | 2 | 2.72 | mA | VI = 0 (E0) | 4 | |
| Quiescent Supply Current Side 1 (5 V) | IDD1 (Q) | 12 | 20 | mA | VI = 1 (E0) | 4 | |
| Quiescent Supply Current Side 2 (5 V) | IDD2 (Q) | 2 | 2.92 | mA | VI = 1 (E0) | 4 | |
| Common-Mode Transient Immunity High | /CMH/ | 75 | 100 | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 5 | |
| Common-Mode Transient Immunity Low | /CML/ | 75 | 100 | kV/µs | VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V | 5 | |
| Propagation Delay (3.3 V) | tPHL, tPLH | 4.8 | 6.8 | 14 | ns | 50% input to 50% output | 6 |
| Supply Voltages | VDD1, VDD2 | 1.7 | 5.5 | V | 17 | ||
| Operating Temperature | TA | -40 | 125 | °C | 17 | ||
| Input Signal Rise and Fall Times | 1 | ms | 17 | ||||
| Storage Temperature Range | TST | -65 | 150 | °C | TA = 25°C | 18 | |
| Ambient Operating Temperature Range | TA | -40 | 125 | °C | TA = 25°C | 18 | |
| Maximum Fault Junction Temperature per DIN V VDE V 0884-11 | TJ | 150 | °C | 18 | |||
| Maximum Fault Junction Temperature per Mold Compound | TJ | 300 | °C | 18 | |||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | 18 | ||
| Input Voltages | VIA, VIB, VIC, VID, VE2 | -0.5 | V | Max is VDDI1 + 0.5 V | 18 | ||
| Output Voltages | VOA, VOB, VOC, VOD | -0.5 | V | Max is VDDO2 + 0.5 V | 18 | ||
| Side 1 Output Current | IO1 | -10 | 10 | mA | Average output current per pin | 18 | |
| Side 2 Output Current | IO2 | -10 | 10 | mA | Average output current per pin | 18 | |
| Common-Mode Transients | -150 | 150 | kV/µs | Across the insulation barrier | 18 | ||
| Junction to Ambient Thermal Resistance RQ-16 QSOP | θJA | 76 | °C/W | Thermocouple located at center of package underside | 13 | ||
| Capacitance (Input to Output) | CI-O | 2.2 | pF | f = 1 MHz | 13 | ||
| Input Capacitance | CI | 4 | pF | 13 | |||
| Rated Dielectric Insulation Voltage RQ-16 | 3000 | V rms | 1-minute duration | 13 | |||
| Minimum External Air Gap (Clearance) RQ-16 | L (I01) | 3.5 | mm | Measured from input terminals to output terminals, shortest distance through air | 13 | ||
| Minimum External Tracking (Creepage) RQ-16 | L (I02) | 3.5 | mm | Measured from input terminals to output terminals, shortest distance path along body | 13 | ||
| Maximum Repetitive Isolation Voltage | VIORM | 565 | V peak | 16 | |||
| Change in Pulse Width Distortion vs. Temperature (5 V) | 1.5 | ps/°C | 4 | ||||
| Jitter (5 V) | 490 | ps p-p | See the Jitter Measurement section | 4 | |||
| Jitter (5 V) | 70 | ps rms | See the Jitter Measurement section | 4 | |||
| Output Rise/Fall Time (5 V) | tR/tF | 2.5 | ns | 10% to 90% | 5 | ||
| Positive VDDx Undervoltage Threshold | VDDxUV+ | 1.6 | V | 5 | |||
| Negative VDDx Undervoltage Threshold | VDDxUV− | 1.5 | V | 5 | |||
| VDDx Undervoltage Hysteresis | VDDxUVH | 0.1 | V | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the R-16 narrow body [SOIC_N] package is proof tested by applying an insulation test | 14 |
CAD (KiCad official)
- Symbol:
ADUM140E0BRQZ - Footprint:
Package_SO:QSOP-16_3.9x4.9mm_P0.635mm - 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files:
adum140e0brqz-etched.step/adum140e0brqz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum140e0brqz.step/adum140e0brqz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (31 pp, sha256
d8dc27340f57bada, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADUM140E0BRQZ
**Analog Devices** · Digital Isolators · QSOP-16-150mil
ADUM140E0BRQZ from Analog Devices, in a QSOP-16-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, with a 0.01 µF to 0.1 µF bypass capacitor recommended between pin 1 and pin 2. |
| 2 | GND1 | power_in | Ground reference for isolator side 1, shorted internally with pin 8 on the same side. |
| 3 | VIA | input | Logic input A on side 1. |
| 4 | VIB | input | Logic input B on side 1. |
| 5 | VIC | input | Logic input C on side 1. |
| 6 | VID | input | Logic input D on side 1. |
| 7 | NIC | unconnected | No internal connection; leave this pin floating. |
| 8 | GND1 | power_in | Ground reference for isolator side 1, second ground pin of side 1. |
| 9 | GND2 | power_in | Ground reference for isolator side 2, second ground pin of side 2. |
| 10 | VE2 | input | Active-high output enable 2: outputs VOA, VOB, VOC and VOD are enabled when VE2 is high or disconnected, and go to high-Z when VE2 is low. |
| 11 | VOD | output | Logic output D on side 2. |
| 12 | VOC | output | Logic output C on side 2. |
| 13 | VOB | output | Logic output B on side 2. |
| 14 | VOA | output | Logic output A on side 2. |
| 15 | GND2 | power_in | Ground reference for isolator side 2, with a bypass capacitor recommended between pin 15 and pin 16. |
| 16 | VDD2 | power_in | Supply voltage for isolator side 2, with a 0.01 µF to 0.1 µF bypass capacitor recommended between pin 15 and pin 16. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | QSOP-16-150mil |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Pulse Width | PW | 6.6 | | | ns | Within pulse width distortion (PWD) limit | 4 |
| Data Rate | | 150 | | | Mbps | Within PWD limit | 4 |
| Propagation Delay (5 V) | tPHL, tPLH | 4.8 | 7.2 | 13 | ns | 50% input to 50% output | 4 |
| Pulse Width Distortion (5 V) | PWD | | 0.5 | 3 | ns | /tPLH − tPHL/ | 4 |
| Propagation Delay Skew (5 V) | tPSK | | | 6.1 | ns | Between any two units at the same temperature, voltage, and load | 4 |
| Channel Matching Codirectional (5 V) | tPSKCD | | 0.5 | 3 | ns | | 4 |
| Channel Matching Opposing Direction (5 V) | tPSKOD | | 0.5 | 3 | ns | | 4 |
| Logic Low Output Voltage (5 V) | VOL | | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 4 |
| Logic Low Output Voltage (5 V) | VOL | | 0.2 | 0.4 | V | IOx = 4 mA, VIx = VIxL | 4 |
| Input Current per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 4 |
| VE2 Enable Input Pull-Up Current | IPU | -10 | | -3 | µA | VE2 = 0 V | 4 |
| Tristate Output Current per Channel | IOZ | -10 | 0.01 | 10 | µA | 0 V ≤ VOx ≤ VDDx | 4 |
| Quiescent Supply Current Side 1 (5 V) | IDD1 (Q) | | 1.2 | 2.2 | mA | VI = 0 (E0) | 4 |
| Quiescent Supply Current Side 2 (5 V) | IDD2 (Q) | | 2 | 2.72 | mA | VI = 0 (E0) | 4 |
| Quiescent Supply Current Side 1 (5 V) | IDD1 (Q) | | 12 | 20 | mA | VI = 1 (E0) | 4 |
| Quiescent Supply Current Side 2 (5 V) | IDD2 (Q) | | 2 | 2.92 | mA | VI = 1 (E0) | 4 |
| Common-Mode Transient Immunity High | /CMH/ | 75 | 100 | | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 5 |
| Common-Mode Transient Immunity Low | /CML/ | 75 | 100 | | kV/µs | VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V | 5 |
| Propagation Delay (3.3 V) | tPHL, tPLH | 4.8 | 6.8 | 14 | ns | 50% input to 50% output | 6 |
| Supply Voltages | VDD1, VDD2 | 1.7 | | 5.5 | V | | 17 |
| Operating Temperature | TA | -40 | | 125 | °C | | 17 |
| Input Signal Rise and Fall Times | | | | 1 | ms | | 17 |
| Storage Temperature Range | TST | -65 | | 150 | °C | TA = 25°C | 18 |
| Ambient Operating Temperature Range | TA | -40 | | 125 | °C | TA = 25°C | 18 |
| Maximum Fault Junction Temperature per DIN V VDE V 0884-11 | TJ | | | 150 | °C | | 18 |
| Maximum Fault Junction Temperature per Mold Compound | TJ | | | 300 | °C | | 18 |
| Supply Voltages | VDD1, VDD2 | -0.5 | | 7 | V | | 18 |
| Input Voltages | VIA, VIB, VIC, VID, VE2 | -0.5 | | | V | Max is VDDI1 + 0.5 V | 18 |
| Output Voltages | VOA, VOB, VOC, VOD | -0.5 | | | V | Max is VDDO2 + 0.5 V | 18 |
| Side 1 Output Current | IO1 | -10 | | 10 | mA | Average output current per pin | 18 |
| Side 2 Output Current | IO2 | -10 | | 10 | mA | Average output current per pin | 18 |
| Common-Mode Transients | | -150 | | 150 | kV/µs | Across the insulation barrier | 18 |
| Junction to Ambient Thermal Resistance RQ-16 QSOP | θJA | | 76 | | °C/W | Thermocouple located at center of package underside | 13 |
| Capacitance (Input to Output) | CI-O | | 2.2 | | pF | f = 1 MHz | 13 |
| Input Capacitance | CI | | 4 | | pF | | 13 |
| Rated Dielectric Insulation Voltage RQ-16 | | | 3000 | | V rms | 1-minute duration | 13 |
| Minimum External Air Gap (Clearance) RQ-16 | L (I01) | | 3.5 | | mm | Measured from input terminals to output terminals, shortest distance through air | 13 |
| Minimum External Tracking (Creepage) RQ-16 | L (I02) | | 3.5 | | mm | Measured from input terminals to output terminals, shortest distance path along body | 13 |
| Maximum Repetitive Isolation Voltage | VIORM | | 565 | | V peak | | 16 |
| Change in Pulse Width Distortion vs. Temperature (5 V) | | | 1.5 | | ps/°C | | 4 |
| Jitter (5 V) | | | 490 | | ps p-p | See the Jitter Measurement section | 4 |
| Jitter (5 V) | | | 70 | | ps rms | See the Jitter Measurement section | 4 |
| Output Rise/Fall Time (5 V) | tR/tF | | 2.5 | | ns | 10% to 90% | 5 |
| Positive VDDx Undervoltage Threshold | VDDxUV+ | | 1.6 | | V | | 5 |
| Negative VDDx Undervoltage Threshold | VDDxUV− | | 1.5 | | V | | 5 |
| VDDx Undervoltage Hysteresis | VDDxUVH | | 0.1 | | V | | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E in the R-16 narrow body [SOIC_N] package is proof tested by applying an insulation test | 14 |
## CAD (KiCad official)
- Symbol: `ADUM140E0BRQZ`
- Footprint: `Package_SO:QSOP-16_3.9x4.9mm_P0.635mm`
- 3D model: QSOP-16-150mil (KiCad packages3D, STEP)
- 3D model files: `adum140e0brqz-etched.step` / `adum140e0brqz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adum140e0brqz.step` / `adum140e0brqz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADuM140D_140E_141D_141E_142D_142E.pdf) (31 pp, sha256 `d8dc27340f57bada`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/adum140e0brqz-datasheet.pdf)