component
ADUM1286BRZ
Public Made by Adomby adom
Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ADUM1286BRZ
Analog Devices · Digital Isolators · SOIC-8
ADUM1286BRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1 (3.135 V to 5.5 V). |
| 2 | VOA | output | Logic output A. |
| 3 | VIB | input | Logic input B. |
| 4 | GND1 | power_in | Ground 1, ground reference for isolator side 1. |
| 5 | GND2 | power_in | Ground 2, ground reference for isolator side 2. |
| 6 | VOB | output | Logic output B. |
| 7 | VIA | input | Logic input A. |
| 8 | VDD2 | power_in | Supply voltage for isolator side 2 (3.135 V to 5.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Propagation Delay (5 V) | tPHL, tPLH | 35 | ns | 50% input to 50% output, 4.5 V ≤ VDDx ≤ 5.5 V, B grade | 3 | ||
| Pulse Width Distortion (5 V) | PWD | 3 | ns | /tPLH − tPHL/, B grade | 3 | ||
| Propagation Delay Skew (5 V) | tPSK | 12 | ns | Between any two units at same operating conditions, B grade | 3 | ||
| Codirectional Channel Matching (5 V) | tPSKCD | 3 | ns | B grade | 3 | ||
| Opposing-Direction Channel Matching (5 V) | tPSKOD | 6 | ns | B grade | 3 | ||
| Pulse Width (5 V) | PW | 40 | ns | Within PWD limit, B grade | 3 | ||
| Data Rate (5 V) | 25 | Mbps | Within PWD limit, B grade | 3 | |||
| IDD1 supply current, 1 Mbps (5 V) | IDD1 | 2.1 | 2.6 | mA | ADuM1286, No load, 1 Mbps | 3 | |
| IDD2 supply current, 1 Mbps (5 V) | IDD2 | 2.3 | 2.9 | mA | ADuM1286, No load, 1 Mbps | 3 | |
| IDD1 supply current, 25 Mbps (5 V) | IDD1 | 4.9 | 6 | mA | ADuM1286, No load, 25 Mbps | 3 | |
| IDD2 supply current, 25 Mbps (5 V) | IDD2 | 4.7 | 6.4 | mA | ADuM1286, No load, 25 Mbps | 3 | |
| Propagation Delay (3.3 V) | tPHL, tPLH | 35 | ns | 50% input to 50% output, 3.135 V ≤ VDDx ≤ 3.6 V, B grade | 4 | ||
| Pulse Width Distortion (3.3 V) | PWD | 3 | ns | /tPLH − tPHL/, B grade | 4 | ||
| Propagation Delay Skew (3.3 V) | tPSK | 16 | ns | Between any two units at same operating conditions, B grade | 4 | ||
| Codirectional Channel Matching (3.3 V) | tPSKCD | 3 | ns | B grade | 4 | ||
| Opposing-Direction Channel Matching (3.3 V) | tPSKOD | 6 | ns | B grade | 4 | ||
| Pulse Width (3.3 V) | PW | 40 | ns | Within PWD limit, B grade | 4 | ||
| Data Rate (3.3 V) | 25 | Mbps | Within PWD limit, B grade | 4 | |||
| IDD1 supply current, 1 Mbps (3.3 V) | IDD1 | 1.6 | 2.1 | mA | ADuM1286, No load, 1 Mbps | 4 | |
| IDD2 supply current, 1 Mbps (3.3 V) | IDD2 | 1.7 | 2.3 | mA | ADuM1286, No load, 1 Mbps | 4 | |
| IDD1 supply current, 25 Mbps (3.3 V) | IDD1 | 3.8 | 5 | mA | ADuM1286, No load, 25 Mbps | 4 | |
| IDD2 supply current, 25 Mbps (3.3 V) | IDD2 | 3.9 | 6.2 | mA | ADuM1286, No load, 25 Mbps | 4 | |
| Input Current per Channel | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 3 |
| Logic High Input Threshold | VIH | 0.7 | VDDx | Printed as 0.7 VDDx | 3 | ||
| Logic Low Input Threshold | VIL | 0.3 | VDDx | Printed as 0.3 VDDx | 3 | ||
| Logic High Output Voltage (5 V), light load | VOH | 5 | V | IOx = −20 µA, VIx = VIxH; min printed as VDDx − 0.1 | 3 | ||
| Logic High Output Voltage (5 V), 3.2 mA | VOH | 4.8 | V | IOx = −3.2 mA, VIx = VIxH; min printed as VDDx − 0.4 | 3 | ||
| Logic Low Output Voltage, 20 µA | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 3 | |
| Logic Low Output Voltage, 3.2 mA | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 3 | |
| Logic High Output Voltage (3.3 V), light load | VOH | 3 | V | IOx = −20 µA, VIx = VIxH; min printed as VDDx − 0.1 | 5 | ||
| Logic High Output Voltage (3.3 V), 3.2 mA | VOH | 2.8 | V | IOx = −3.2 mA, VIx = VIxH; min printed as VDDx − 0.4 | 5 | ||
| Quiescent Input Supply Current (5 V) | IDDI(Q) | 0.54 | 0.8 | mA | Per channel, 5 V operation | 3 | |
| Quiescent Output Supply Current (5 V) | IDDO(Q) | 1.6 | 2 | mA | Per channel, 5 V operation | 3 | |
| Quiescent Input Supply Current (3.3 V) | IDDI(Q) | 0.4 | 0.6 | mA | Per channel, 3.3 V operation | 5 | |
| Quiescent Output Supply Current (3.3 V) | IDDO(Q) | 1.2 | 1.7 | mA | Per channel, 3.3 V operation | 5 | |
| Common-Mode Transient Immunity | /CM/ | 25 | 35 | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 4 | |
| Positive VDDx UVLO Threshold | VDDXUV+ | 2.75 | V | 4 | |||
| Negative VDDx UVLO Threshold | VDDXUV− | 2.65 | V | 4 | |||
| Operating Temperature | TA | -40 | 125 | °C | 10 | ||
| Supply Voltages | VDD1, VDD2 | 3.135 | 5.5 | V | A, B, and C Grades | 10 | |
| Input Signal Rise and Fall Times | 1 | ms | 10 | ||||
| Storage Temperature | TST | -65 | 150 | °C | TA = 25°C | 11 | |
| Ambient Operating Temperature | TA | -40 | 125 | °C | TA = 25°C | 11 | |
| Supply Voltage | VDD1, VDD2 | -0.5 | 7 | V | TA = 25°C | 11 | |
| Input Voltage | VIA, VIB | -0.5 | V | Max printed as VDDI + 0.5 V | 11 | ||
| Output Voltage | VOA, VOB | -0.5 | V | Max printed as VDD2 + 0.5 V | 11 | ||
| Average Output Current per Pin | IO1, IO2 | -10 | 10 | mA | Side 1 and Side 2 | 11 | |
| Common-Mode Transients | -100 | 100 | kV/µs | Across the insulation barrier | 11 | ||
| IC Junction-to-Ambient Thermal Resistance | θJA | 85 | °C/W | Thermocouple located at center of package underside | 8 | ||
| Resistance (Input-to-Output) | RI-O | 1013 | Ω | Pin 1-4 shorted, Pin 5-8 shorted | 8 | ||
| Capacitance (Input-to-Output) | CI-O | 2 | pF | f = 1 MHz | 8 | ||
| Input Capacitance | CI | 4 | pF | From any input data pin to ground | 8 | ||
| Rated Dielectric Insulation Voltage | VISO | 3000 | VRMS | 1-minute duration | 9 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM1280/ADuM1281/ADuM1285/ADuM1286 is proof tested by applying an insulation test voltage ≥ 1050 VPEAK for 1 second (partial discharge detec | 8 |
CAD (KiCad official)
- Symbol:
ADUM1286BRZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adum1286brz-etched.step/adum1286brz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum1286brz.step/adum1286brz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (18 pp, sha256
9143762bd346e43a, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).