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ADUM1285BRZ
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Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownADUM1285BRZ
Analog Devices · Digital Isolators · SOIC-8
ADUM1285BRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for isolator side 1, specified at 3.135 V to 5.5 V. |
| 2 | VIA | input | Logic input A on side 1 of the isolation barrier. |
| 3 | VIB | input | Logic input B on side 1 of the isolation barrier. |
| 4 | GND1 | power_in | Ground reference for isolator side 1. |
| 5 | GND2 | power_in | Ground reference for isolator side 2. |
| 6 | VOB | output | Logic output B on side 2 of the isolation barrier. |
| 7 | VOA | output | Logic output A on side 2 of the isolation barrier. |
| 8 | VDD2 | power_in | Supply voltage for isolator side 2, specified at 3.135 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | TA | -40 | 125 | °C | 10 | ||
| Supply Voltages VDD1, VDD2 (A, B, and C Grades) | VDD1, VDD2 | 3.135 | 5.5 | V | A, B, and C Grades | 10 | |
| Input Signal Rise and Fall Times | 1 | ms | 10 | ||||
| Storage Temperature | TST | -65 | 150 | °C | 11 | ||
| Ambient Operating Temperature | TA | -40 | 125 | °C | 11 | ||
| Supply Voltages | VDD1, VDD2 | -0.5 | 7 | V | 11 | ||
| Input Voltages | VIA, VIB | -0.5 | V | Maximum printed as VDDI + 0.5 V | 11 | ||
| Output Voltages | VOA, VOB | -0.5 | V | Maximum printed as VDD2 + 0.5 V | 11 | ||
| Average Output Current per Pin Side 1 | IO1 | -10 | 10 | mA | 11 | ||
| Average Output Current per Pin Side 2 | IO2 | -10 | 10 | mA | 11 | ||
| Common-Mode Transients | -100 | 100 | kV/μs | 11 | |||
| Pulse Width (5 V operation) | PW | 40 | ns | Within PWD limit | 3 | ||
| Data Rate (5 V operation) | 25 | Mbps | Within PWD limit | 3 | |||
| Propagation Delay (5 V operation) | tPHL, tPLH | 35 | ns | 50% input to 50% output | 3 | ||
| Pulse Width Distortion (5 V operation) | PWD | 3 | ns | /tPLH − tPHL/ | 3 | ||
| Pulse Width Distortion Change vs. Temperature (5 V operation) | 3 | ps/°C | 3 | ||||
| Propagation Delay Skew (5 V operation) | tPSK | 12 | ns | Between any two units at same operating conditions | 3 | ||
| Channel Matching Codirectional (5 V operation) | tPSKCD | 3 | ns | 3 | |||
| Channel Matching Opposing-Direction (5 V operation) | tPSKOD | 6 | ns | 3 | |||
| Jitter (5 V operation) | 2 | ns | 3 | ||||
| Supply Current IDD1 ADuM1285 (5 V operation) | IDD1 | 1.1 | 1.6 | mA | No load; 1 Mbps | 3 | |
| Supply Current IDD1 ADuM1285 (5 V operation) | IDD1 | 6.2 | 7 | mA | No load; 25 Mbps | 3 | |
| Supply Current IDD2 ADuM1285 (5 V operation) | IDD2 | 2.7 | 4.5 | mA | No load; 1 Mbps | 3 | |
| Supply Current IDD2 ADuM1285 (5 V operation) | IDD2 | 4.8 | 7 | mA | No load; 25 Mbps | 3 | |
| Logic Low Output Voltage (5 V operation) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 3 | |
| Logic Low Output Voltage (5 V operation) | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 3 | |
| Input Current per Channel (5 V operation) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 3 |
| Quiescent Input Supply Current (5 V operation) | IDDI(Q) | 0.54 | 0.8 | mA | 3 | ||
| Quiescent Output Supply Current (5 V operation) | IDDO(Q) | 1.6 | 2 | mA | 3 | ||
| Common-Mode Transient Immunity (5 V operation) | /CM/ | 25 | 35 | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 4 | |
| Pulse Width (3.3 V operation) | PW | 40 | ns | Within PWD limit | 4 | ||
| Data Rate (3.3 V operation) | 25 | Mbps | Within PWD limit | 4 | |||
| Propagation Delay (3.3 V operation) | tPHL, tPLH | 35 | ns | 50% input to 50% output | 4 | ||
| Pulse Width Distortion (3.3 V operation) | PWD | 3 | ns | /tPLH − tPHL/ | 4 | ||
| Pulse Width Distortion Change vs. Temperature (3.3 V operation) | 3 | ps/°C | 4 | ||||
| Propagation Delay Skew (3.3 V operation) | tPSK | 16 | ns | Between any two units at same operating conditions | 4 | ||
| Channel Matching Codirectional (3.3 V operation) | tPSKCD | 3 | ns | 4 | |||
| Channel Matching Opposing-Direction (3.3 V operation) | tPSKOD | 6 | ns | 4 | |||
| Jitter (3.3 V operation) | 2 | ns | 4 | ||||
| Supply Current IDD1 ADuM1285 (3.3 V operation) | IDD1 | 0.75 | 1.4 | mA | No load; 1 Mbps | 4 | |
| Supply Current IDD1 ADuM1285 (3.3 V operation) | IDD1 | 5.1 | 9 | mA | No load; 25 Mbps | 4 | |
| Supply Current IDD2 ADuM1285 (3.3 V operation) | IDD2 | 2 | 3.5 | mA | No load; 1 Mbps | 4 | |
| Supply Current IDD2 ADuM1285 (3.3 V operation) | IDD2 | 2.7 | 4.6 | mA | No load; 25 Mbps | 4 | |
| Logic Low Output Voltage (3.3 V operation) | VOL | 0 | 0.1 | V | IOx = 20 µA, VIx = VIxL | 5 | |
| Logic Low Output Voltage (3.3 V operation) | VOL | 0.2 | 0.4 | V | IOx = 3.2 mA, VIx = VIxL | 5 | |
| Input Current per Channel (3.3 V operation) | II | -10 | 0.01 | 10 | µA | 0 V ≤ VIx ≤ VDDx | 5 |
| Quiescent Input Supply Current (3.3 V operation) | IDDI(Q) | 0.4 | 0.6 | mA | 5 | ||
| Quiescent Output Supply Current (3.3 V operation) | IDDO(Q) | 1.2 | 1.7 | mA | 5 | ||
| Common-Mode Transient Immunity (3.3 V operation) | /CM/ | 25 | 35 | kV/µs | VIx = VDDx, VCM = 1000 V, transient magnitude = 800 V | 5 | |
| Supply Current IDD1 ADuM1285 (mixed 5 V/3.3 V) | IDD1 | 1.1 | 1.6 | mA | No load; 1 Mbps | 6 | |
| Supply Current IDD1 ADuM1285 (mixed 5 V/3.3 V) | IDD1 | 6.2 | 7 | mA | No load; 25 Mbps | 6 | |
| Supply Current IDD2 ADuM1285 (mixed 5 V/3.3 V) | IDD2 | 2 | 3.5 | mA | No load; 1 Mbps | 6 | |
| Supply Current IDD2 ADuM1285 (mixed 5 V/3.3 V) | IDD2 | 2.7 | 4.6 | mA | No load; 25 Mbps | 6 | |
| Supply Current IDD1 ADuM1285 (mixed 3.3 V/5 V) | IDD1 | 0.75 | 1.4 | mA | No load; 1 Mbps | 7 | |
| Supply Current IDD1 ADuM1285 (mixed 3.3 V/5 V) | IDD1 | 5.1 | 9 | mA | No load; 25 Mbps | 7 | |
| Supply Current IDD2 ADuM1285 (mixed 3.3 V/5 V) | IDD2 | 2.7 | 4.5 | mA | No load; 1 Mbps | 7 | |
| Supply Current IDD2 ADuM1285 (mixed 3.3 V/5 V) | IDD2 | 4.8 | 7 | mA | No load; 25 Mbps | 7 | |
| Thermal Resistance Junction-to-Ambient | θJA | 85 | °C/W | Thermocouple located at center of package underside | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM1280/ADuM1281/ADuM1285/ADuM1286 is proof tested by applying an insulation test voltage ≥ 1050 VPEAK for 1 second (partial discharge detec | 8 |
CAD (KiCad official)
- Symbol:
ADUM1285BRZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adum1285brz-etched.step/adum1285brz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum1285brz.step/adum1285brz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (18 pp, sha256
9143762bd346e43a, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).