component
ADUM1252AWA+
Public Made by Adomby adom
Analog Devices Inc./Maxim Integrated , SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| docs | 3d ago |
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| adum1252awa-etched.step | 3d ago |
| adum1252awa-hero.glb | 3d ago |
| adum1252awa-hero.overlay.json | 3d ago |
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| verification.json | 3d ago |
ADUM1252AWA+
Analog Devices Inc./Maxim Integrated · IC · SOIC-8
ADUM1252AWA+ from Analog Devices Inc./Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Side 1 supply voltage, independent of VDD2 and specified from 1.71V to 5.5V; bypass with 1nF and 0.1μF ceramic capacitors placed as close to the pin as possible. |
| 2 | SDA1 | bidirectional | Side 1 serial data input/output, translated to and from SDA2, implemented as an open-drain output that regulates logic-low to about 0.64V and sinks up to 5mA. |
| 3 | SCL1 | bidirectional | Side 1 serial clock input/output, translated to and from SCL2, implemented as an open-drain output that regulates logic-low to about 0.64V and sinks up to 5mA. |
| 4 | GND1 | power_in | Ground reference for side 1. |
| 5 | GND2 | power_in | Ground reference for side 2. |
| 6 | SCL2 | bidirectional | Side 2 serial clock input/output, translated to and from SCL1, implemented as an open-drain output with conventional (unregulated) logic-low and sinking up to 50mA. |
| 7 | SDA2 | bidirectional | Side 2 serial data input/output, translated to and from SDA1, implemented as an open-drain output with conventional (unregulated) logic-low and sinking up to 50mA. |
| 8 | VDD2 | power_in | Side 2 supply voltage, independent of VDD1 and specified from 1.71V to 5.5V; bypass with 1nF and 0.1μF ceramic capacitors placed as close to the pin as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc./Maxim Integrated |
| Package | SOIC-8 |
| Category | |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage VDD1 relative to GND1 | VDD1 | 1.71 | 5.5 | V | 3 | ||
| Supply Voltage VDD2 relative to GND2 | VDD2 | 1.71 | 5.5 | V | 3 | ||
| Undervoltage-Lockout Threshold Side_ | VUVLO_ | 1.48 | 1.6 | 1.65 | V | VDD_ rising | 3 |
| Supply Current Side 1 | IDD1 | 20 | 34 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA1/SCL1 = VDD1 | 3 | |
| Supply Current Side 1 | IDD1 | 200 | 250 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA1/SCL1 = 400kHz square wave | 3 | |
| Supply Current Side 1 | IDD1 | 270 | 340 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA1/SCL1 = 1MHz square wave | 3 | |
| Supply Current Side 2 | IDD2 | 21 | 35 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA2/SCL2 = VDD2 | 3 | |
| Supply Current Side 2 | IDD2 | 49 | 70 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA2/SCL2 = GND2 | 3 | |
| Supply Current Side 2 | IDD2 | 84 | 110 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA2/SCL2 = 400kHz square wave | 3 | |
| Supply Current Side 2 | IDD2 | 146 | 180 | µA | VDD1 = VDD2 = 1.8V - 5V, SDA2/SCL2 = 1MHz square wave | 3 | |
| Input High Voltage, SDA1/SCL1 | VIH1 | 0.52 | 0.56 | 0.62 | V | Relative to GND1 | 3 |
| Input Low Voltage, SDA1/SCL1 | VIL1 | 0.47 | 0.51 | 0.56 | V | Relative to GND1 | 3 |
| Output Low Voltage, SDA1/SCL1 | VOL1 | 0.59 | 0.64 | 0.69 | V | Relative to GND1, I = 0.1mA - 5mA sink | 3 |
| Output Low Voltage, Side 2 | VOL2 | 0.4 | V | SDA2/SCL2 to GND2, I = 50mA sink | 4 | ||
| Static Output Loading Side 1 | ISDA1/SCL1 | 0.1 | 5 | mA | Side 1 | 4 | |
| Static Output Loading Side 2 | ISDA2/SCL2 | 0.1 | 50 | mA | Side 2 | 4 | |
| Leakage Current | IL | -10 | 10 | µA | Device unpowered, SDA1/SCL1 = 5.5V, VDD1 = 0V | 4 | |
| ESD Human Body Model | ESD | -8 | 8 | kV | Human Body Model, VDD1 to same side pins, VDD2 to same side pins | 4 | |
| ESD Human Body Model | ESD | -17 | 17 | kV | Human Body Model, SDA1/SCL1 to GND1 | 4 | |
| ESD IEC 61000-4-2 contact discharge | ESD | -8 | 8 | kV | IEC 61000-4-2 contact discharge, SDA1/SCL1 to GND1 unpowered | 4 | |
| ESD IEC 61000-4-2 contact discharge | ESD | -5 | 5 | kV | IEC 61000-4-2 contact discharge (GND2 to GND1), 8 Wide SOIC | 4 | |
| Fall Time Side 1 | tF1 | 8.8 | 20.3 | 36.1 | ns | SDA1/SCL1 = 0.7 x VDD1 to 0.3 x VDD1; 4.5V ≤ VDD1 ≤ 5.5V, CL1 = 40pF, R1 = 1.6kΩ | 4 |
| Fall Time Side 1 | tF1 | 6.1 | 13.7 | 24.1 | ns | SDA1/SCL1 = 0.7 x VDD1 to 0.3 x VDD1; 3.0V ≤ VDD1 ≤ 3.6V, CL1 = 40pF, R1 = 1kΩ | 4 |
| Fall Time Side 1 | tF1 | 4.6 | 10.4 | 18.5 | ns | SDA1/SCL1 = 0.7 x VDD1 to 0.75V; 2.25V ≤ VDD1 ≤ 2.75V, CL1 = 40pF, R1 = 810Ω | 5 |
| Fall Time Side 1 | tF1 | 2.4 | 4.7 | 11.5 | ns | SDA1/SCL1 = 0.7 x VDD1 to 0.75V; 1.71V ≤ VDD1 ≤ 1.89V, CL1 = 40pF, R1 = 470Ω | 5 |
| Fall Time Side 1 | tF1 | 15.4 | 34.7 | 64.7 | ns | SDA1/SCL1 = 0.9 x VDD1 to 0.9V; 4.5V ≤ VDD1 ≤ 5.5V, CL1 = 40pF, R1 = 1.6kΩ | 5 |
| Fall Time Side 1 | tF1 | 9.1 | 19.7 | 35.9 | ns | SDA1/SCL1 = 0.9 x VDD1 to 0.9V; 3.0V ≤ VDD1 ≤ 3.6V, CL1 = 40pF, R1 = 1kΩ | 5 |
| Fall Time Side 1 | tF1 | 6 | 12.2 | 23.3 | ns | SDA1/SCL1 = 0.9 x VDD1 to 0.9V; 2.25V ≤ VDD1 ≤ 2.75V, CL1 = 40pF, R1 = 810Ω | 5 |
| Fall Time Side 1 | tF1 | 3.8 | 6.5 | 11.1 | ns | SDA1/SCL1 = 0.9 x VDD1 to 0.9V; 1.71V ≤ VDD1 ≤ 1.89V, CL1 = 40pF, R1 = 470Ω | 5 |
| Fall Time Side 2 | tF2 | 11.8 | 18.6 | 30 | ns | SDA2/SCL2 = 0.7 x VDD2 to 0.3 x VDD2; 4.5V ≤ VDD2 ≤ 5.5V, CL2 = 400pF, R2 = 180Ω | 5 |
| Fall Time Side 2 | tF2 | 9 | 13.8 | 21 | ns | SDA2/SCL2 = 0.7 x VDD2 to 0.3 x VDD2; 3.0V ≤ VDD2 ≤ 3.6V, CL2 = 400pF, R2 = 120Ω | 5 |
| Fall Time Side 2 | tF2 | 7.6 | 11.6 | 17 | ns | SDA2/SCL2 = 0.7 x VDD2 to 0.3 x VDD2; 2.25V ≤ VDD2 ≤ 2.75V, CL2 = 400pF, R2 = 91Ω | 5 |
| Fall Time Side 2 | tF2 | 6.5 | 9.5 | 13.4 | ns | SDA2/SCL2 = 0.7 x VDD2 to 0.3 x VDD2; 1.71V ≤ VDD2 ≤ 1.89V, CL2 = 400pF, R2 = 81Ω | 5 |
| Fall Time Side 2 | tF2 | 25.7 | 41 | 63 | ns | SDA2/SCL2 = 0.9 x VDD2 to 0.4V; 4.5V ≤ VDD2 ≤ 5.5V, CL2 = 400pF, R2 = 180Ω | 5 |
| Fall Time Side 2 | tF2 | 19 | 29 | 44.4 | ns | SDA2/SCL2 = 0.9 x VDD2 to 0.4V; 3.0V ≤ VDD2 ≤ 3.6V, CL2 = 400pF, R2 = 120Ω | 5 |
| Fall Time Side 2 | tF2 | 15.5 | 24 | 36.3 | ns | SDA2/SCL2 = 0.9 x VDD2 to 0.4V; 2.25V ≤ VDD2 ≤ 2.75V, CL2 = 400pF, R2 = 91Ω | 5 |
| Fall Time Side 2 | tF2 | 12.4 | 18 | 26.1 | ns | SDA2/SCL2 = 0.9 x VDD2 to 0.4V; 1.71V ≤ VDD2 ≤ 1.89V, CL2 = 400pF, R2 = 81Ω | 5 |
| Propagation Delay | tPLH12 | 37.6 | 50 | ns | SDA1/SCL1 = 0.66V to SDA2/SCL2 = 0.7 x VDD2; 4.5V ≤ VDD_ ≤ 5.5V, CL1 = 20pF, R1 = 1.6kΩ, CL2 = 20pF, R2 = 180Ω | 5 | |
| Propagation Delay | tPLH12 | 35.9 | 48 | ns | SDA1/SCL1 = 0.66V to SDA2/SCL2 = 0.7 x VDD2; 3.0V ≤ VDD_ ≤ 3.6V, CL1 = 20pF, R1 = 1kΩ, CL2 = 20pF, R2 = 120Ω | 5 | |
| Supply Voltage VDD1 to GND1 (absolute) | VDD1 | -0.3 | 6 | V | VDD1 to GND1 | 2 | |
| Supply Voltage VDD2 to GND2 (absolute) | VDD2 | -0.3 | 6 | V | VDD2 to GND2 | 2 | |
| SDA1, SCL1 to GND1 | SDA1, SCL1 | -0.3 | 6 | V | to GND1 | 2 | |
| SDA2, SCL2 to GND2 | SDA2, SCL2 | -0.3 | 6 | V | to GND2 | 2 | |
| Short-Circuit Continuous Current | 20 | mA | SDA1, SCL1 to VDD1 | 2 | |||
| Short-Circuit Continuous Current | 100 | mA | SDA2, SCL2 to VDD2 | 2 | |||
| Continuous Power Dissipation 8 WSOIC | 471 | mW | 8 WSOIC, derate 5.88mW/°C above +70°C | 2 | |||
| Operating Temperature Range | TA | -40 | 125 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Soldering Temperature (reflow) | 260 | °C | Reflow | 2 | |||
| Junction-to-Ambient Thermal Resistance 8 Wide SOIC | θJA | 170 | °C/W | 8 Wide SOIC, JEDEC JESD51-7 four-layer board | 2 | ||
| Junction-to-Case Top Thermal Resistance 8 Wide SOIC | θJC(TOP) | 64 | °C/W | 8 Wide SOIC | 2 | ||
| Junction-to-Board Thermal Resistance 8 Wide SOIC | θJB | 60.9 | °C/W | 8 Wide SOIC | 2 | ||
| Junction-to-Case Top Thermal Characterization Parameter 8 Wide SOIC | ψJT | 12 | °C/W | 8 Wide SOIC | 2 | ||
| Junction-to-Board Thermal Characterization Parameter 8 Wide SOIC | ψJB | 62 | °C/W | 8 Wide SOIC | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pet | Reinforced insulation, maximum transient isolation voltage 4242VPK, maximum repetitive peak isolation voltage 630VPK. | 13 |
CAD (KiCad official)
- Symbol:
ADUM1252AWA+ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
adum1252awa-etched.step/adum1252awa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adum1252awa.step/adum1252awa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc./Maxim Integrated datasheet (22 pp, sha256
e24d8c3b32cc1778, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).