ADUM1241ARSZ from Analog Devices, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD1	power_in	Supply voltage for isolator Side 1 (2.25 V to 3.6 V); connect a ceramic bypass capacitor of 0.01 µF to 0.1 µF between VDD1 and GND1.
2	GND1	power_in	Ground reference for isolator Side 1; pin 2 and pin 10 are internally connected, and connecting both to GND1 is recommended.
3	NIC	unconnected	Not internally connected; leave this pin floating.
4	NIC	unconnected	Not internally connected; leave this pin floating.
5	VOA	output	Logic Output A.
6	VIB	input	Logic Input B.
7	EN1	input	Refresh and watchdog enable 1; connecting to GND1 enables input/output refresh and watchdog for Side 1, while tying to VDD1 disables them for lowest power operation, and EN1 and EN2 must be set to the same logic state.
8	NIC	unconnected	Not internally connected; leave this pin floating.
9	NIC	unconnected	Not internally connected; leave this pin floating.
10	GND1	power_in	Ground reference for isolator Side 1; pin 2 and pin 10 are internally connected, and connecting both to GND1 is recommended.
11	GND2	power_in	Ground reference for isolator Side 2; pin 11 and pin 19 are internally connected, and connecting both to GND2 is recommended.
12	NIC	unconnected	Not internally connected; leave this pin floating.
13	NIC	unconnected	Not internally connected; leave this pin floating.
14	EN2	input	Refresh and watchdog enable 2; connecting to GND2 enables input/output refresh and watchdog for Side 2, while tying to VDD2 disables them for lowest power operation, and EN1 and EN2 must be set to the same logic state.
15	VOB	output	Logic Output B.
16	VIA	input	Logic Input A.
17	NIC	unconnected	Not internally connected; leave this pin floating.
18	NIC	unconnected	Not internally connected; leave this pin floating.
19	GND2	power_in	Ground reference for isolator Side 2; pin 11 and pin 19 are internally connected, and connecting both to GND2 is recommended.
20	VDD2	power_in	Supply voltage for isolator Side 2 (2.25 V to 3.6 V); connect a ceramic bypass capacitor of 0.01 µF to 0.1 µF between VDD2 and GND2.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SSOP-20-208mil
Category	Communication Interface Chip/UART/485/232
Pins	20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Propagation Delay	tPHL, tPLH		80	180	ns	50% input to 50% output	4
Change vs. Temperature (propagation delay)			200		ps/°C		4
Minimum Pulse Width	PW	500			ns	Within PWD limit	4
Pulse Width Distortion	PWD			8	ns	/tPLH − tPHL/	4
Propagation Delay Skew	tPSK			10	ns		4
Channel Matching Codirectional	tPSKCD			10	ns		4
Channel Matching Opposing Direction	tPSKOD			15	ns		4
Supply Current ADuM1241/ADuM1246 side 1	IDD1		306	450	µA	2 Mbps, no load	4
Supply Current ADuM1241/ADuM1246 side 2	IDD2		306	450	µA	2 Mbps, no load	4
Positive Threshold Voltage	VT+		1.8		V		4
Negative Going Threshold Voltage	VT−		1.2		V		4
Input Hysteresis	ΔVT		0.6		V		4
Undervoltage Lockout, VDD1 or VDD2	UVLO		1.5		V		4
Input Current per Channel	II	-1	0.01	1	µA	0 V ≤ VIx ≤ VDDx1	4
Quiescent Input Supply Current	IDDI (Q)		4.8	10	µA	ENX low	4
Quiescent Output Supply Current	IDDO (Q)		0.8	6	µA	ENX low	4
Quiescent Input Supply Current (Refresh Off)	IDDI (Q)		0.12		µA	ENX high	5
Quiescent Output Supply Current (Refresh Off)	IDDO (Q)		0.13		µA	ENX high	5
Dynamic Input Supply Current	IDDI (D)		88		µA/Mbps		5
Dynamic Output Supply Current	IDDO (D)		60		µA/Mbps		5
Output Rise Time/Fall Time	tR/tF			2	ns	10% to 90%	5
Common-Mode Transient Immunity	/CM/	25	40		kV/µs	VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V	5
Refresh Rate	fr		14		kbps		5
Propagation Delay 2.5 V	tPHL, tPLH		112	180	ns	50% input to 50% output	5
Change vs. Temperature (propagation delay 2.5 V)			280		ps/°C		5
Pulse Width Distortion 2.5 V	PWD			12	ns	/tPLH − tPHL/	5
Minimum Pulse Width 2.5 V	PW	500			ns	Within PWD limit	5
Propagation Delay Skew 2.5 V	tPSK			10	ns		5
Channel Matching Codirectional 2.5 V	tPSKCD			10	ns		5
Channel Matching Opposing Direction 2.5 V	tPSKOD			30	ns		5
Supply Current ADuM1241/ADuM1246 side 1 at 2.5 V	IDD1		240	375	µA	2 Mbps, no load	5
Supply Current ADuM1241/ADuM1246 side 2 at 2.5 V	IDD2		240	375	µA	2 Mbps, no load	5
Input Current per Channel 2.5 V	II	-1	0.01	1	µA	0 V ≤ VIx ≤ VDDx1	6
Positive Threshold Voltage 2.5 V	VT+		1.5		V		6
Negative Going Threshold Voltage 2.5 V	VT−		1		V		6
Input Hysteresis 2.5 V	ΔVT		0.5		V		6
Undervoltage Lockout 2.5 V	UVLO		1.5		V		6
Quiescent Input Supply Current 2.5 V	IDDI (Q)		2.6	3.75	µA	ENX low	6
Quiescent Output Supply Current 2.5 V	IDDO (Q)		0.5	3.75	µA	ENX low	6
Quiescent Input Supply Current (Refresh Off) 2.5 V	IDDI (Q)		0.05		µA	ENX high	6
Quiescent Output Supply Current (Refresh Off) 2.5 V	IDDO (Q)		0.05		µA	ENX high	6
Dynamic Input Supply Current 2.5 V	IDDI (D)		76		µA/Mbps		6
Dynamic Output Supply Current 2.5 V	IDDO (D)		41		µA/Mbps		6
Output Rise Time/Fall Time 2.5 V	tR/tF			2	ns	10% to 90%	6
Common-Mode Transient Immunity 2.5 V	/CM/	25	40		kV/µs	VIx = VDDx1, VCM = 1000 V, transient magnitude = 800 V	6
Refresh Rate 2.5 V	fr		14		kbps		6
Propagation Delay Side 1 to Side 2 (VDD1 3.3 V, VDD2 2.5 V)	tPHL, tPLH		84	180	ns	50% input to 50% output	7
Propagation Delay Side 2 to Side 1 (VDD1 3.3 V, VDD2 2.5 V)	tPHL, tPLH		120	180	ns	50% input to 50% output	7
Pulse Width Distortion (VDD1 3.3 V, VDD2 2.5 V)	PWD			12	ns	/tPLH − tPHL/	7
Supply Current ADuM1241 side 1 (VDD1 3.3 V, VDD2 2.5 V)	IDD1		306	400	µA	2 Mbps, no load	7
Supply Current ADuM1241 side 2 (VDD1 3.3 V, VDD2 2.5 V)	IDD2		240	375	µA	2 Mbps, no load	7
Propagation Delay Side 1 to Side 2 (VDD1 2.5 V, VDD2 3.3 V)	tPHL, tPLH		120	180	ns	50% input to 50% output	7
Propagation Delay Side 2 to Side 1 (VDD1 2.5 V, VDD2 3.3 V)	tPHL, tPLH		84	180	ns	50% input to 50% output	7
Supply Current ADuM1241 side 1 (VDD1 2.5 V, VDD2 3.3 V)	IDD1		240	375	µA	2 Mbps, no load	8
Supply Current ADuM1241 side 2 (VDD1 2.5 V, VDD2 3.3 V)	IDD2		306	450	µA	2 Mbps, no load	8
Operating Temperature	TA	-40		125	°C		11
Supply Voltages	VDD1, VDD2	2.25		3.6	V		11
Input Signal Rise and Fall Times				1	ms		11
Storage Temperature Range	TST	-65		150	°C		12
Ambient Operating Temperature Range	TA	-40		125	°C		12
Supply Voltages	VDD1, VDD2	-0.5		5	V		12
Average Output Current per Pin Side 1	IO1	-10		10	mA		12
Average Output Current per Pin Side 2	IO2	-10		10	mA		12
Common-Mode Transients		-100		100	kV/µs	Refers to common-mode transients across the insulation barrier	12

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	pC		In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM1240/ADuM1241/ADuM1245/ADuM1246 is proof tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detec	8

CAD (KiCad official)

Symbol: ADUM1241ARSZ
Footprint: Package_SO:SSOP-20_5.3x7.2mm_P0.65mm
3D model: SSOP-20-208mil (KiCad packages3D, STEP)
3D model files: adum1241arsz-etched.step / adum1241arsz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum1241arsz.step / adum1241arsz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (23 pp, sha256 45fcde7a76f1bf6b, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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ADUM1241ARSZ

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