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ADUM120N1BRZ-RL7

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Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADUM120N1BRZ-RL7

Analog Devices · Digital Isolators · SOIC-8

ADUM120N1BRZ-RL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1; this pin requires a 0.01 µF to 0.1 µF decoupling capacitor.
2 VIA input Logic input A.
3 VIB input Logic input B.
4 GND1 power_in Ground reference for isolator side 1.
5 GND2 power_in Ground reference for isolator side 2.
6 VOB output Logic output B.
7 VOA output Logic output A.
8 VDD2 power_in Supply voltage for isolator side 2; this pin requires a 0.01 µF to 0.1 µF decoupling capacitor.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Signal Isolation Devices
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltages VDD1, VDD2 1.7 5.5 V 12
Operating Temperature TA -40 125 °C 12
Input Signal Rise and Fall Times 1 ms 12
Supply Voltages (VDD1, VDD2) VDD1, VDD2 -0.5 7 V 13
Input Voltages (VIA, VIB) VIA, VIB -0.5 V Max is VDDI + 0.5 V 13
Output Voltages (VOA, VOB) VOA, VOB -0.5 V Max is VDDO + 0.5 V 13
Side 1 Output Current IO1 -10 10 mA Average output current per pin 13
Side 2 Output Current IO2 -10 10 mA Average output current per pin 13
Common-Mode Transients -150 150 kV/µs Across the insulation barrier 13
Storage Temperature Range TST -65 150 °C 13
Ambient Operating Temperature Range TA -40 125 °C 13
Maximum Junction Temperature TS 150 °C Safety limiting value per DIN VDE V 0884-11 12
Total Power Dissipation at 25°C PS 1.56 W Safety limiting value at 25°C 12
Propagation Delay (5 V operation) tPHL, tPLH 4.8 7.2 13 ns 50% input to 50% output 3
Propagation Delay (3.3 V operation) tPHL, tPLH 4.8 6.8 14 ns 50% input to 50% output 5
Propagation Delay (2.5 V operation) tPHL, tPLH 5 7 14 ns 50% input to 50% output 7
Propagation Delay (1.8 V operation) tPHL, tPLH 5.8 8.7 15 ns 50% input to 50% output 9
Propagation Delay Skew (5 V operation) tPSK 6 ns Between any two units at the same temperature, voltage, and load 3
Propagation Delay Skew (3.3 V operation) tPSK 7 ns Between any two units at the same temperature, voltage, and load 5
Propagation Delay Skew (2.5 V operation) tPSK 7 ns Between any two units at the same temperature, voltage, load 7
Propagation Delay Skew (1.8 V operation) tPSK 7 ns Between any two units at the same temperature, voltage, and load 9
Channel Matching Codirectional (5 V operation) tPSKCD 0.5 3 ns 3
Channel Matching Codirectional (3.3 V operation) tPSKCD 0.7 3 ns 5
Channel Matching Codirectional (2.5 V operation) tPSKCD 0.7 3 ns 7
Channel Matching Codirectional (1.8 V operation) tPSKCD 0.7 3 ns 9
Channel Matching Opposing Direction (5 V operation) tPSKOD 0.5 3 ns 3
Channel Matching Opposing Direction (3.3 V operation) tPSKOD 0.7 3 ns 5
Channel Matching Opposing Direction (2.5 V operation) tPSKOD 0.7 3 ns 7
Channel Matching Opposing Direction (1.8 V operation) tPSKOD 0.7 3 ns 9
Input Current per Channel (5 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 3
Input Current per Channel (3.3 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 5
Input Current per Channel (2.5 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 7
Input Current per Channel (1.8 V operation) II -10 0.01 10 µA 0 V ≤ VIx ≤ VDDx 9
Quiescent Supply Current ADuM120N, Side 1 (5 V operation) IDD1 (Q) 0.9 1.3 mA VI4 = 0 (N0), 1 (N1) 3
Quiescent Supply Current ADuM120N, Side 2 (5 V operation) IDD2 (Q) 1.3 1.8 mA VI4 = 0 (N0), 1 (N1) 3
Quiescent Supply Current ADuM120N, Side 1 (5 V operation) IDD1 (Q) 6.4 10 mA VI4 = 1 (N0), 0 (N1) 3
Quiescent Supply Current ADuM120N, Side 2 (5 V operation) IDD2 (Q) 1.4 1.9 mA VI4 = 1 (N0), 0 (N1) 3
Quiescent Supply Current ADuM120N, Side 1 (3.3 V operation) IDD1 (Q) 0.8 1.3 mA VI4 = 0 (N0), 1 (N1) 5
Quiescent Supply Current ADuM120N, Side 2 (3.3 V operation) IDD2 (Q) 1.2 1.8 mA VI4 = 0 (N0), 1 (N1) 5
Quiescent Supply Current ADuM120N, Side 1 (3.3 V operation) IDD1 (Q) 6.3 9.7 mA VI4 = 1 (N0), 0 (N1) 5
Quiescent Supply Current ADuM120N, Side 2 (3.3 V operation) IDD2 (Q) 1.3 1.8 mA VI4 = 1 (N0), 0 (N1) 5
Quiescent Supply Current ADuM120N, Side 1 (2.5 V operation) IDD1 (Q) 0.8 1.2 mA VI4 = 0 (N0), 1 (N1) 7
Quiescent Supply Current ADuM120N, Side 2 (2.5 V operation) IDD2 (Q) 1.2 1.8 mA VI4 = 0 (N0), 1 (N1) 7
Quiescent Supply Current ADuM120N, Side 1 (2.5 V operation) IDD1 (Q) 6.2 9.5 mA VI4 = 1 (N0), 0 (N1) 7
Quiescent Supply Current ADuM120N, Side 2 (2.5 V operation) IDD2 (Q) 1.3 1.8 mA VI4 = 1 (N0), 0 (N1) 7
Quiescent Supply Current ADuM120N, Side 1 (1.8 V operation) IDD1 (Q) 0.7 1.2 mA VI4 = 0 (N0), 1 (N1) 9
Quiescent Supply Current ADuM120N, Side 2 (1.8 V operation) IDD2 (Q) 1.2 1.8 mA VI4 = 0 (N0), 1 (N1) 9
Quiescent Supply Current ADuM120N, Side 1 (1.8 V operation) IDD1 (Q) 6.2 9.6 mA VI4 = 1 (N0), 0 (N1) 9
Quiescent Supply Current ADuM120N, Side 2 (1.8 V operation) IDD2 (Q) 1.3 1.8 mA VI4 = 1 (N0), 0 (N1) 9
Logic Low Output Voltage (5 V operation, 20 µA) VOL 0 0.1 V IOx1 = 20 µA, VIx = VIxL 3
Logic Low Output Voltage (5 V operation, 4 mA) VOL 0.2 0.4 V IOx1 = 4 mA, VIx = VIxL 3
Logic Low Output Voltage (3.3 V operation, 20 µA) VOL 0 0.1 V IOx1 = 20 µA, VIx = VIxL 5
Logic Low Output Voltage (3.3 V operation, 2 mA) VOL 0.2 0.4 V IOx1 = 2 mA, VIx = VIxL 5
Logic Low Output Voltage (2.5 V operation, 20 µA) VOL 0 0.1 V IOx1 = 20 µA, VIx = VIxL 7
Logic Low Output Voltage (2.5 V operation, 2 mA) VOL 0.2 0.4 V IOx1 = 2 mA, VIx = VIxL 7
Logic Low Output Voltage (1.8 V operation, 20 µA) VOL 0 0.1 V IOx1 = 20 µA, VIx = VIxL 9
Logic Low Output Voltage (1.8 V operation, 2 mA) VOL 0.2 0.4 V IOx1 = 2 mA, VIx = VIxL 9
IC Junction to Ambient Thermal Resistance θJA 80 °C/W Thermocouple located at center of package underside 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing abs insulation barrier. Common-mode transients exceeding the absolute 13

CAD (KiCad official)

  • Symbol: ADUM120N1BRZ-RL7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adum120n1brz-rl7-etched.step / adum120n1brz-rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum120n1brz-rl7.step / adum120n1brz-rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 371894ab0ea9620e, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF