ADUM1200WTRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD1	power_in	Supply voltage for isolator Side 1, 3.0 V to 5.5 V for the W automotive grade.
2	VIA	input	Logic Input A on Side 1, with input voltage range of -0.5 V to VDDI + 0.5 V.
3	VIB	input	Logic Input B on Side 1, with input voltage range of -0.5 V to VDDI + 0.5 V.
4	GND1	power_in	Ground 1, the ground reference for isolator Side 1.
5	GND2	power_in	Ground 2, the ground reference for isolator Side 2.
6	VOB	output	Logic Output B on Side 2, with output voltage range of -0.5 V to VDDO + 0.5 V.
7	VOA	output	Logic Output A on Side 2, with output voltage range of -0.5 V to VDDO + 0.5 V.
8	VDD2	power_in	Supply voltage for isolator Side 2, 3.0 V to 5.5 V for the W automotive grade.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-8
Category	Communication Interface Chip/UART/485/232
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Supply Current per Channel, Quiescent	IDDI (Q)		0.5	0.6	mA	5 V, 125°C operation	11
Output Supply Current per Channel, Quiescent	IDDO (Q)		0.19	0.25	mA	5 V, 125°C operation	11
ADuM1200W VDD1 Supply Current, DC to 2 Mbps	IDD1 (Q)		1.1	1.4	mA	5 V; DC to 1 MHz logic signal freq.	11
ADuM1200W VDD2 Supply Current, DC to 2 Mbps	IDD2 (Q)		0.5	0.8	mA	5 V; DC to 1 MHz logic signal freq.	11
ADuM1200W VDD1 Supply Current, 10 Mbps	IDD1 (10)		4.3	5.5	mA	5 V; 5 MHz logic signal freq.	11
ADuM1200W VDD2 Supply Current, 10 Mbps	IDD2 (10)		1.3	2	mA	5 V; 5 MHz logic signal freq.	11
Input Currents	IIA, IIB	-10	0.01	10	µA	0 V ≤ VIA, VIB ≤ (VDD1 or VDD2)	12
Logic Low Output Voltage	VOAL, VOBL		0	0.1	V	IOx = 20 µA, VIx = VIxL	12
Logic Low Output Voltage	VOAL, VOBL		0.04	0.1	V	IOx = 400 µA, VIx = VIxL	12
Logic Low Output Voltage	VOAL, VOBL		0.2	0.4	V	IOx = 4 mA, VIx = VIxL	12
Minimum Pulse Width (WTRZ), 5 V	PW			100	ns	CL = 15 pF, CMOS signal levels	12
Maximum Data Rate (WTRZ), 5 V		10			Mbps	CL = 15 pF, CMOS signal levels	12
Propagation Delay (WTRZ), 5 V	tPHL, tPLH	20		50	ns	CL = 15 pF, CMOS signal levels	12
Pulse Width Distortion (WTRZ), 5 V	PWD			3	ns	/tPLH − tPHL/; CL = 15 pF, CMOS signal levels	12
Propagation Delay Skew (WTRZ), 5 V	tPSK			15	ns	CL = 15 pF, CMOS signal levels	12
Channel-to-Channel Matching, Codirectional (WTRZ), 5 V	tPSKCD			3	ns	CL = 15 pF, CMOS signal levels	12
Channel-to-Channel Matching, Opposing Directional (WTRZ), 5 V	tPSKOD			15	ns	CL = 15 pF, CMOS signal levels	12
Common-Mode Transient Immunity, Logic High Output	/CMH/	25	35		kV/µs	VIx = VDD1, VDD2, VCM = 1000 V, transient magnitude = 800 V	12
Common-Mode Transient Immunity, Logic Low Output	/CML/	25	35		kV/µs	VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V	13
Input Supply Current per Channel, Quiescent	IDDI (Q)		0.26	0.35	mA	3 V, 125°C operation	13
Output Supply Current per Channel, Quiescent	IDDO (Q)		0.11	0.2	mA	3 V, 125°C operation	13
ADuM1200W VDD1 Supply Current, DC to 2 Mbps	IDD1 (Q)		0.6	1	mA	3 V; DC to 1 MHz logic signal freq.	13
ADuM1200W VDD2 Supply Current, DC to 2 Mbps	IDD2 (Q)		0.2	0.6	mA	3 V; DC to 1 MHz logic signal freq.	13
ADuM1200W VDD1 Supply Current, 10 Mbps	IDD1 (10)		2.2	3.4	mA	3 V; 5 MHz logic signal freq.	13
ADuM1200W VDD2 Supply Current, 10 Mbps	IDD2 (10)		0.7	1.1	mA	3 V; 5 MHz logic signal freq.	13
Propagation Delay (WTRZ), 3 V	tPHL, tPLH	20		60	ns	CL = 15 pF, CMOS signal levels	14
Pulse Width Distortion (WTRZ), 3 V	PWD			3	ns	/tPLH − tPHL/; CL = 15 pF, CMOS signal levels	14
Propagation Delay Skew (WTRZ), 3 V	tPSK			22	ns	CL = 15 pF, CMOS signal levels	14
Channel-to-Channel Matching, Codirectional (WTRZ), 3 V	tPSKCD			3	ns	CL = 15 pF, CMOS signal levels	14
Channel-to-Channel Matching, Opposing Directional (WTRZ), 3 V	tPSKOD			22	ns	CL = 15 pF, CMOS signal levels	14
Propagation Delay (WTRZ), mixed 5 V/3 V	tPHL, tPLH	15		55	ns	CL = 15 pF, CMOS signal levels	17
Propagation Delay (WTRZ), mixed 3 V/5 V	tPHL, tPLH	15		55	ns	CL = 15 pF, CMOS signal levels	19
Supply Voltage (recommended)	VDD1, VDD2	3		5.5	V	Applies to ADuM1200W and ADuM1201W	23
Operating Temperature (recommended)	TA	-40		125	°C	Applies to ADuM1200W and ADuM1201W	23
Input Signal Rise and Fall Times				1	ms		23
Storage Temperature	TST	-55		150	°C		24
Ambient Operating Temperature	TA	-40		125	°C	Applies to ADuM1200W and ADuM1201W	24
Supply Voltages	VDD1, VDD2	-0.5		7	V	Relative to the respective ground	24
Average Output Current per Pin	IO	-11		11	mA		24
Common-Mode Transients	CML, CMH	-100		100	kV/µs	Across the insulation barrier	24
Rated Dielectric Insulation Voltage			2500		VRMS	1 minute duration	21
Capacitance (Input-to-Output)	CI-O		1		pF	f = 1 MHz	20
Input Capacitance	CI		4		pF		20
IC Junction-to-Case Thermal Resistance, Side 1	θJCI		46		°C/W	Thermocouple located at center of package underside	20
IC Junction-to-Case Thermal Resistance, Side 2	θJCO		41		°C/W		20
Change vs. Temperature (Propagation Delay), 5 V			5		ps/°C	WTRZ	12
Output Rise/Fall Time (10% to 90%), 5 V	tR/tF		2.5		ns	CL = 15 pF, CMOS signal levels	12
Output Rise/Fall Time (10% to 90%), 3 V	tR/tF		3		ns	CL = 15 pF, CMOS signal levels	14
Refresh Rate, 5 V	fr		1.2		Mbps		13
Input Dynamic Supply Current per Channel, 5 V	IDDI (D)		0.19		mA/Mbps		13
Output Dynamic Supply Current per Channel, 5 V	IDDO (D)		0.05		mA/Mbps		13

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	pC		In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM1200 and ADuM1201 is proof tested by applying an insulation test voltage ≥ 1050 VPEAK for 1 sec (partial discharge detection limit = 5 pC	21

CAD (KiCad official)

Symbol: ADUM1200WTRZ
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: adum1200wtrz-etched.step / adum1200wtrz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum1200wtrz.step / adum1200wtrz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (31 pp, sha256 4f652988304d2ad2, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ADUM1200WTRZ

Verified ADUM1200WTRZ

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3D Model

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