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ADUM110N0BRZ

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Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Verified ADUM110N0BRZ

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADUM110N0BRZ · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 16-page datasheet
  • ✓distributor: lcsc C207413, digikey 505-ADUM110N0BRZ-ND, mouser 584-ADUM110N0BRZ
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-0uk5r61m/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ adum110n0brz.kicad_sym✓ adum110n0brz.kicad_mod✓ adum110n0brz.step
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ADUM110N0BRZ

Analog Devices · Digital Isolators · SOIC-8

ADUM110N0BRZ from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage for isolator side 1, operating range 1.7 V to 5.5 V (bypass to pin 4 with 0.01 µF to 0.1 µF).
2 VI input Logic input on side 1; input voltage range is −0.5 V to VDDI + 0.5 V, with thresholds of 0.7 × VDD1 (high) and 0.3 × VDD1 (low).
3 VDD1 power_in Supply voltage for isolator side 1, operating range 1.7 V to 5.5 V.
4 GND1 power_in Ground 1, the ground reference for isolator side 1.
5 GND2 power_in Ground 2, the ground reference for isolator side 2.
6 VO output Logic output on side 2; fail-safe state is low for the ADuM110N0 when the input side is unpowered, with output current rated −10 mA to +10 mA.
7 GND2 power_in Ground 2, the ground reference for isolator side 2.
8 VDD2 power_in Supply voltage for isolator side 2, operating range 1.7 V to 5.5 V (bypass to pin 5 with 0.01 µF to 0.1 µF).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Propagation Delay tPHL, tPLH 4.8 7.2 13 ns 5 V; 50% input to 50% output 3
Pulse Width Distortion PWD 0.5 3 ns 5 V; /tPLH − tPHL/ 3
Propagation Delay Skew tPSK 6 ns 5 V; between any two units at same temperature, voltage, and load 3
Output Voltage Logic Low VOL 0 0.1 V 5 V; IO = 20 µA, VI = VIL 3
Output Voltage Logic Low VOL 0.2 0.4 V 5 V; IO = 4 mA, VI = VIL 3
Input Current per Channel II -10 0.01 10 µA 0 V ≤ VI ≤ VDD1 3
Quiescent Supply Current Side 1 IDD1 (Q) 0.9 1.4 mA 5 V; VI = 0 (N0) 3
Quiescent Supply Current Side 2 IDD2 (Q) 1 1.3 mA 5 V; VI = 0 (N0) 3
Quiescent Supply Current Side 1 IDD1 (Q) 3.6 6 mA 5 V; VI = 1 (N0) 3
Quiescent Supply Current Side 2 IDD2 (Q) 1 1.4 mA 5 V; VI = 1 (N0) 3
Common-Mode Transient Immunity High /CMH/ 75 100 kV/µs 5 V; VI = VDD1, VCM = 1000 V, transient magnitude = 800 V 3
Common-Mode Transient Immunity Low /CML/ 75 100 kV/µs 5 V; VI = 0 V, VCM = 1000 V, transient magnitude = 800 V 3
Propagation Delay tPHL, tPLH 4.8 6.8 14 ns 3.3 V; 50% input to 50% output 4
Pulse Width Distortion PWD 0.7 3 ns 3.3 V; /tPLH − tPHL/ 4
Propagation Delay Skew tPSK 7 ns 3.3 V; between any two units at same temperature, voltage, and load 4
Output Voltage Logic Low VOL 0 0.1 V 3.3 V; IO = 20 µA, VI = VIL 4
Output Voltage Logic Low VOL 0.2 0.4 V 3.3 V; IO = 2 mA, VI = VIL 4
Quiescent Supply Current Side 1 IDD1 (Q) 0.8 1.3 mA 3.3 V; VI = 0 (N0) 4
Quiescent Supply Current Side 2 IDD2 (Q) 0.9 1.4 mA 3.3 V; VI = 0 (N0) 4
Quiescent Supply Current Side 1 IDD1 (Q) 3.6 5.8 mA 3.3 V; VI = 1 (N0) 4
Common-Mode Transient Immunity High /CMH/ 75 100 kV/µs 3.3 V; VI = VDD1, VCM = 1000 V, transient magnitude = 800 V 5
Common-Mode Transient Immunity Low /CML/ 75 100 kV/µs 3.3 V; VI = 0 V, VCM = 1000 V, transient magnitude = 800 V 5
Propagation Delay tPHL, tPLH 5 7 14 ns 2.5 V; 50% input to 50% output 5
Pulse Width Distortion PWD 0.7 3 ns 2.5 V; /tPLH − tPHL/ 5
Propagation Delay Skew tPSK 7 ns 2.5 V; between any two units at same temperature, voltage, load 5
Output Voltage Logic Low VOL 0 0.1 V 2.5 V; IO = 20 µA, VI = VIL 5
Output Voltage Logic Low VOL 0.2 0.4 V 2.5 V; IO = 2 mA, VI = VIL 5
Quiescent Supply Current Side 1 IDD1 (Q) 0.8 1.1 mA 2.5 V; VI = 0 (N0) 5
Quiescent Supply Current Side 2 IDD2 (Q) 0.9 1.2 mA 2.5 V; VI = 0 (N0) 5
Quiescent Supply Current Side 1 IDD1 (Q) 3.5 5.6 mA 2.5 V; VI = 1 (N0) 5
Quiescent Supply Current Side 2 IDD2 (Q) 1 1.2 mA 2.5 V; VI = 1 (N0) 6
Common-Mode Transient Immunity High /CMH/ 75 100 kV/µs 2.5 V; VI = VDD1, VCM = 1000 V, transient magnitude = 800 V 6
Common-Mode Transient Immunity Low /CML/ 75 100 kV/µs 2.5 V; VI = 0 V, VCM = 1000 V, transient magnitude = 800 V 6
Propagation Delay tPHL, tPLH 5.8 8.7 15 ns 1.8 V; 50% input to 50% output 6
Pulse Width Distortion PWD 0.7 3 ns 1.8 V; /tPLH − tPHL/ 6
Propagation Delay Skew tPSK 7 ns 1.8 V; between any two units at same temperature, voltage, and load 6
Output Voltage Logic Low VOL 0 0.1 V 1.8 V; IO = 20 µA, VI = VIL 7
Output Voltage Logic Low VOL 0.2 0.4 V 1.8 V; IO = 2 mA, VI = VIL 7
Quiescent Supply Current Side 1 IDD1 (Q) 0.7 1.1 mA 1.8 V; VI = 0 (N0) 7
Quiescent Supply Current Side 2 IDD2 (Q) 0.9 1.2 mA 1.8 V; VI = 0 (N0) 7
Quiescent Supply Current Side 1 IDD1 (Q) 3.4 5.4 mA 1.8 V; VI = 1 (N0) 7
Common-Mode Transient Immunity High /CMH/ 75 100 kV/µs 1.8 V; VI = VDD1, VCM = 1000 V, transient magnitude = 800 V 7
Common-Mode Transient Immunity Low /CML/ 75 100 kV/µs 1.8 V; V1 = 0 V, VCM = 1000 V, transient magnitude = 800 V 7
Pulse Width PW 6.6 ns Within pulse width distortion (PWD) limit 3
Data Rate 150 Mbps Within PWD limit 3
IC Junction to Ambient Thermal Resistance θJA 80 °C/W Thermocouple located at center of package underside 8
Operating Temperature TA -40 125 °C 9
Supply Voltage VDD1 VDD1 1.7 5.5 V 9
Supply Voltage VDD2 VDD2 1.7 5.5 V 9
Storage Temperature TST -65 150 °C TA = 25°C 10
Supply Voltage VDD1 to GND1 VDD1 -0.5 7 V TA = 25°C 10
Supply Voltage VDD2 to GND2 VDD2 -0.5 7 V TA = 25°C 10
Side 2 Output Current IO2 -10 10 mA Average output current per pin 10
Common-Mode Transients -150 150 kV/µs Across the insulation barrier 10

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pC In accordance with DIN EN IEC 60747-17 (VDE 0884-17), each ADuM110N is proof tested by applying an insulation test voltage ≥ 1059 VPEAK for 1 sec (partial discharge detection limit = 5 pC). The * mark 8

CAD (KiCad official)

  • Symbol: ADUM110N0BRZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: adum110n0brz-etched.step / adum110n0brz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); adum110n0brz.step / adum110n0brz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 0a32ebb3ee4ede3f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF