ADUM1100ARZ-RL7

{
  "slug": "adum1100arz-rl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Digital Isolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "signal isolation devices",
    "adum1100arz-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "adum1100arz-rl7.kicad_sym",
    "adum1100arz-rl7.kicad_mod",
    "adum1100arz-rl7.glb",
    "adum1100arz-rl7.step",
    "adum1100arz-rl7.lbr",
    "docs/hero.png",
    "docs/adum1100arz-rl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "adum1100arz-rl7-hero.glb",
    "adum1100arz-rl7-hero.overlay.json",
    "adum1100arz-rl7-etched.glb"
  ],
  "component": {
    "mpn": "ADUM1100ARZ-RL7",
    "manufacturer": "Analog Devices",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Signal Isolation Devices",
    "subcategory": "Digital Isolators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879873805340672",
    "parts": {
      "symbol": "adum1100arz-rl7.kicad_sym",
      "footprint": "adum1100arz-rl7.kicad_mod",
      "model_3d": "adum1100arz-rl7-hero.glb",
      "model_3d_plain": "adum1100arz-rl7-etched.glb",
      "model_3d_step": "adum1100arz-rl7-etched.step",
      "model_3d_step_plain": "adum1100arz-rl7.step",
      "lbr": "adum1100arz-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C201193",
      "digikey": "ADUM1100ARZ-RL7TR-ND",
      "mouser": "584-ADUM1100ARZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T22:45:53Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "ADUM1100ARZ-RL7TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-ADUM1100ARZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Input supply voltage, 3.0 V to 5.5 V; pin 1 and pin 3 are internally connected, and either or both may be used for VDD1."
      },
      {
        "number": "2",
        "name": "VI",
        "type": "input",
        "description": "Logic input; for 5 V operation VIH is 2.0 V minimum and VIL is 0.8 V maximum, and for 3.3 V operation VIH is 1.5 V minimum and VIL is 0.5 V maximum, with 300 mV of input hysteresis."
      },
      {
        "number": "3",
        "name": "VDD1",
        "type": "power_in",
        "description": "Input supply voltage, 3.0 V to 5.5 V; pin 3 is internally connected to pin 1, and either or both may be used for VDD1."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Input ground reference for the side 1 circuitry; all voltages are relative to this ground."
      },
      {
        "number": "5",
        "name": "GND2",
        "type": "power_in",
        "description": "Output ground reference; pin 5 is internally connected to pin 7, and either or both may be used for GND2."
      },
      {
        "number": "6",
        "name": "VO",
        "type": "output",
        "description": "Logic output; VO returns to the VI state within 1 µs of power restoration, and the output is referenced to VDD2 and GND2."
      },
      {
        "number": "7",
        "name": "GND2",
        "type": "power_in",
        "description": "Output ground reference; pin 7 is internally connected to pin 5, and either or both may be used for GND2."
      },
      {
        "number": "8",
        "name": "VDD2",
        "type": "power_in",
        "description": "Output supply voltage, 3.0 V to 5.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pins 1 and 3 (VDD1) and pins 5 and 7 (GND2) are internally connected per the Table 11 footnotes, so ; The Table 11 description for VO is only 'Logic Output'; the output-side behavior and the 1 µs power-"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0628,
        "at": "2026-10-18T22:43:55"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879873805340672",
        "pages": 20,
        "sha256": "d9e977acbe03330e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
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        "role": "plain",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "adum1100arz-rl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
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        "sha256": "9bb2a63aad00f665099c72a5b2e7db883aba2c03b9ca65063052a8447688f738",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}