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docs	Publish 0.1.0 · Ray	10h ago
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ads9234rirhbr-etched.glb	ads9234rirhbr: factory component page (tier=lcsc) · Ray	10h ago
ads9234rirhbr-etched.step	ads9234rirhbr: factory component page (tier=lcsc) · Ray	10h ago
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README.md	Initial commit: component/ads9234rirhbr · Ray	10h ago

ADS9234RIRHBR

Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)

ADS9234RIRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AINP_A	input	Positive analog input for channel A; absolute limits are -0.3 V to AVDD + 0.3 V to GND.
2	AINM_A	input	Negative analog input for channel A; absolute limits are -0.3 V to AVDD + 0.3 V to GND.
3	REFby2	output	REFby2 buffer output, used to set the common-mode voltage; connect a 1-µF decoupling capacitor between pin 3 and pin 4.
4	GND	power_in	Ground.
5	REFOUT	output	Internal reference output; connect a 1-µF decoupling capacitor between pin 5 and pin 4.
6	NC	unconnected	No external connection.
7	AINM_B	input	Negative analog input for channel B; absolute limits are -0.3 V to AVDD + 0.3 V to GND.
8	AINP_B	input	Positive analog input for channel B; absolute limits are -0.3 V to AVDD + 0.3 V to GND.
9	REFM_B	output	Negative output of reference buffer B and negative reference input for ADC_B; externally connect to the device GND.
10	REFP_B	output	Positive output of reference buffer B and positive reference input for ADC_B; the text calls for a 10-µF decoupling capacitor here but cites pins 9 and 10 for it.
11	GND	power_in	Ground.
12	AVDD	power_in	Analog power supply (4.5 V to 5.5 V, 5 V nominal); connect a 1-µF decoupling capacitor between pin 12 and pin 11.
13	CONVST	input	Conversion start input; a CONVST rising edge starts the conversion for ADC_A and ADC_B.
14	CS	input	Active-low chip-select input; host and device communicate when CS is low, and the SDO-x pins go to Hi-Z when CS is high.
15	SDI	input	Serial data input used to program the device registers.
16	SCLK	input	Clock input for the serial interface.
17	SDO-7/3B	tri_state	SPI mode: data output 3 for channel B; parallel byte mode: MSB of the data byte; Hi-Z when CS is high.
18	SDO-6/2B	tri_state	SPI mode: data output 2 for channel B; parallel byte mode: LSB+6 of the data byte; Hi-Z when CS is high.
19	SDO-5/1B	tri_state	SPI mode: data output 1 for channel B; parallel byte mode: LSB+5 of the data byte; Hi-Z when CS is high.
20	SDO-4/0B	tri_state	SPI mode: data output 0 for channel B; parallel byte mode: LSB+4 of the data byte; Hi-Z when CS is high.
21	SDO-3/3A	tri_state	SPI mode: data output 3 for channel A; parallel byte mode: LSB+3 of the data byte; Hi-Z when CS is high.
22	SDO-2/2A	tri_state	SPI mode: data output 2 for channel A; parallel byte mode: LSB+2 of the data byte; Hi-Z when CS is high.
23	SDO-1/1A	tri_state	SPI mode: data output 1 for channel A; parallel byte mode: LSB+1 of the data byte; Hi-Z when CS is high.
24	SDO-0/0A	tri_state	SPI mode: data output 0 for channel A; parallel byte mode: LSB of the data byte; Hi-Z when CS is high.
25	READY/STROBE	output	Indicates data ready or provides a strobe output for data capture.
26	PD/RST	input	Asynchronous reset or power-down input; see the Reset or Power-Down section of the datasheet.
27	GND	power_in	Ground.
28	DVDD	power_in	Interface power supply; 1.65 V to 5.5 V, or 2.35 V minimum when SCLK exceeds 20 MHz. Connect a 1-µF decoupling capacitor between pin 27 and pin 28.
29	AVDD	power_in	Analog power supply (4.5 V to 5.5 V, 5 V nominal); connect a 1-µF decoupling capacitor between pin 29 and pin 30.
30	GND	power_in	Ground.
31	REFP_A	output	Positive output of reference buffer A and positive reference input for ADC_A; connect a 10-µF decoupling capacitor between pin 31 and pin 32.
32	REFM_A	output	Negative output of reference buffer A and negative reference input for ADC_A; externally connect to the device GND.
33	Thermal pad	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-32-EP(5x5)
Category	ADC/DAC/Data Conversion
Pins	33

CAD (KiCad official)

Symbol: ADS9234RIRHBR
Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
3D model files: ads9234rirhbr-etched.step / ads9234rirhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads9234rirhbr.step / ads9234rirhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (66 pp, sha256 e8405ba4f4929a21, retrieved 2026-10-08, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF