Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗

Loads when you scroll to it. Unloads after 5 minutes in the background.

Download PDF

Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

ADS9226IRHBR

Texas Instruments · Analog To Digital Converters (ADC) · VQFN-32(5x5)

ADS9226IRHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AINP_A	input	Positive analog input for channel A, which must stay within -0.1 V to AVDD + 0.1 V to GND.
2	AINM_A	input	Negative analog input for channel A, which must stay within VREFIN - 0.1 V to VREFIN + 0.1 V.
3	NC	unconnected	No external connection.
4	GND	power_in	Device ground.
5	REFIN	input	Reference voltage input for the ADC, with external reference range of 1.4 V to AVDD/1.75 - 0.2 V.
6	NC	unconnected	No external connection.
7	AINM_B	input	Negative analog input for channel B, which must stay within VREFIN - 0.1 V to VREFIN + 0.1 V.
8	AINP_B	input	Positive analog input for channel B, which must stay within -0.1 V to AVDD + 0.1 V to GND.
9	REFM_B	input	Negative reference input for ADC_B, which must be connected externally to device GND.
10	REFP_B	output	Positive output of reference buffer B and positive reference input for ADC_B, requiring a 10-µF decoupling capacitor between pins 9 and 10.
11	GND	power_in	Device ground.
12	AVDD	power_in	Analog power supply, 4 V to 5.5 V; short pins 12 and 29 together and place a 1-µF decoupling capacitor between pins 11 and 12.
13	CS	input	Active-low chip-select input that gives the device control of the data bus when low; connect to CS pin 14 externally with a short trace.
14	CS	input	Active-low chip-select input that gives the device control of the data bus when low; connect to CS pin 13 externally with a short trace.
15	GND	power_in	Device ground.
16	SCLK	input	Clock input pin for the serial interface.
17	NC	unconnected	No external connection.
18	NC	unconnected	No external connection.
19	SDO-1B	output	Data output 1 for channel B, which goes to Hi-Z when CS is high.
20	SDO-0B	output	Data output 0 for channel B, which goes to Hi-Z when CS is high.
21	NC	unconnected	No external connection.
22	NC	unconnected	No external connection.
23	SDO-1A	output	Data output 1 for channel A, which goes to Hi-Z when CS is high.
24	SDO-0A	output	Data output 0 for channel A, which goes to Hi-Z when CS is high.
25	NC	unconnected	No external connection.
26	DVDD	power_in	Interface power supply, 1.65 V to 5.5 V in operation and 2.35 V to 5.5 V for SCLK above 20 MHz; place 1-µF decoupling capacitors between pins 27 and 26 and between pins 27 and 28.
27	GND	power_in	Device ground.
28	DVDD	power_in	Interface power supply, 1.65 V to 5.5 V in operation and 2.35 V to 5.5 V for SCLK above 20 MHz; place 1-µF decoupling capacitors between pins 27 and 28.
29	AVDD	power_in	Analog power supply, 4 V to 5.5 V; short pins 12 and 29 together and place a 1-µF decoupling capacitor between pins 29 and 30.
30	GND	power_in	Device ground.
31	REFP_A	output	Positive output of reference buffer A and positive reference input for ADC_A, requiring a 10-µF decoupling capacitor between pins 31 and 32.
32	REFM_A	input	Negative reference input for ADC_A, which must be connected externally to device GND.
33	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-32(5x5)
Category	Data Acquisition
Pins	33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
AVDD to GND		-0.3		6	V		5
DVDD to GND		-0.3		6	V		5
Reference input voltage REFIN to GND		-0.3			V		5
Input or output current to any pin except power-supply pin		-10		10	mA	any pin except power-supply pin	5
Junction temperature	TJ			150	°C		5
Storage temperature	Tstg	-65		150	°C		5
AVDD	AVDD	4	5	5.5	V		5
DVDD operating	DVDD	1.65	3	5.5	V	Operating	5
DVDD with SCLK above 20 MHz	DVDD	2.35	3	5.5	V	SCLK > 20 MHz	5
External reference input voltage	VREFIN	1.4			V	External reference input voltage	5
Absolute input voltage AINP_x	VINP_x	-0.1			V	AINP_x	5
Ambient temperature	TA	-40	25	125	°C		5
Analog input leakage current	IIN	-1		1	µA		6
Differential nonlinearity	DNL	-0.55	0.25	0.55	LSB		6
Integral nonlinearity	INL	-2.75	1	2.75	LSB		6
Offset error	EO	-9	2	9	LSB		6
Offset error matching		-0.5		0.5	LSB		6
Gain error	GE	-0.027	0.01	0.027	%FSR		6
Signal-to-noise ratio	SNR	88	90.8		dB	fIN = 2 kHz	6
Signal-to-noise plus distortion	SINAD	87	90.5		dB	fIN = 2 kHz	6
Reference buffer output offset	VREFP_x - VREFIN	-1	0	1	mV	(VREFP_x - VREFIN)	7
Reference buffer output mismatch	VREFP_A - VREFP_B	-500	50	500	µV	(VREFP_A - VREFP_B)	7
Reference buffer output capacitor	CREFP_x	7	10	27	µF	For specified performance, between each pair of REFP_x and REFM_x	7
Low-level input voltage (DVDD > 2.3 V)	VIL	-0.3			V	DVDD > 2.3 V	7
Low-level input voltage (DVDD ≤ 2.3 V)	VIL	-0.3			V	DVDD ≤ 2.3 V	7
Low-level output voltage	VOL	0			V	IOH = 500-µA sink	7
Analog supply current	IAVDD		16.5	20	mA	AVDD = 5 V, fDATA = 2.048 MSPS	7
SCLK high time	tPH_CLK	0.45		0.55	tCLK		8
SCLK low time	tPL_CLK	0.45		0.55	tCLK		8
Junction-to-ambient thermal resistance	RθJA		29		°C/W	RHB (VQFN) 32 pins	6
Junction-to-case (top) thermal resistance	RθJC(top)		17.1		°C/W	RHB (VQFN) 32 pins	6
Junction-to-board thermal resistance	RθJB		9.4		°C/W	RHB (VQFN) 32 pins	6
Junction-to-top characterization parameter	ΨJT		0.2		°C/W	RHB (VQFN) 32 pins	6
Junction-to-board characterization parameter	ΨJB		9.4		°C/W	RHB (VQFN) 32 pins	6
Junction-to-case (bottom) thermal resistance	RθJC(bot)		0.8		°C/W	RHB (VQFN) 32 pins	6

CAD (KiCad official)

Symbol: ADS9226IRHBR
Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
3D model files: ads9226irhbr-etched.step / ads9226irhbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads9226irhbr.step / ads9226irhbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (38 pp, sha256 5d0e721ebbdbd323, retrieved 2026-11-02, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF