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ADS9224RIRHBT

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Texas Instruments Analog To Digital Converters (ADC), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ADS9224RIRHBT

Texas Instruments · Analog To Digital Converters (ADC) · QFN-32-EP(5x5)

ADS9224RIRHBT from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AINP_A passive Positive analog input for channel A.
2 AINM_A passive Negative analog input for channel A.
3 REFby2 passive REFby2 buffer output; connect a 1-µF decoupling capacitor between pin 3 and pin 4.
4 GND power_in Ground; pins 4, 11, 27 and 30 are the device ground pins, and pin 4 is the decoupling return for REFby2 and REFOUT.
5 REFOUT passive Internal reference output; connect a 1-µF decoupling capacitor between pin 5 and pin 4.
6 NC unconnected No external connection.
7 AINM_B passive Negative analog input for channel B.
8 AINP_B passive Positive analog input for channel B.
9 REFM_B passive Negative output of reference buffer B and negative reference input for ADC_B; externally connect to the device GND.
10 REFP_B passive Positive output of reference buffer B and positive reference input for ADC_B; connect a 10-µF decoupling capacitor between pin 9 and pin 10.
11 GND power_in Ground; pin 11 is the return for the 1-µF AVDD decoupling capacitor on pin 12.
12 AVDD power_in Analog power-supply pin; connect a 1-µF decoupling capacitor between pin 12 and pin 11.
13 CONVST input Conversion start input; a CONVST rising edge starts the conversion for ADC_A and ADC_B.
14 CS input Active-low chip-select input; the host and device communicate when CS is low, and the SDO-x pins go Hi-Z when CS is high.
15 SDI input Serial data input used to program the device registers.
16 SCLK input Clock input pin for the serial interface.
17 SDO-7/3B tri_state In SPI mode, data output 3 for channel B; in parallel byte mode, the most significant bit (MSB) of the data byte; Hi-Z when CS is high.
18 SDO-6/2B tri_state In SPI mode, data output 2 for channel B; in parallel byte mode, LSB+6 of the data byte; Hi-Z when CS is high.
19 SDO-5/1B tri_state In SPI mode, data output 1 for channel B; in parallel byte mode, LSB+5 of the data byte; Hi-Z when CS is high.
20 SDO-4/0B tri_state In SPI mode, data output 0 for channel B; in parallel byte mode, LSB+4 of the data byte; Hi-Z when CS is high.
21 SDO-3/3A tri_state In SPI mode, data output 3 for channel A; in parallel byte mode, LSB+3 of the data byte; Hi-Z when CS is high.
22 SDO-2/2A tri_state In SPI mode, data output 2 for channel A; in parallel byte mode, LSB+2 of the data byte; Hi-Z when CS is high.
23 SDO-1/1A tri_state In SPI mode, data output 1 for channel A; in parallel byte mode, LSB+1 of the data byte; Hi-Z when CS is high.
24 SDO-0/0A tri_state In SPI mode, data output 0 for channel A; in parallel byte mode, the least significant bit (LSB) of the data byte; Hi-Z when CS is high.
25 READY/STROBE output Digital output that indicates data ready or provides a strobe output for data capture.
26 PD/RST input Asynchronous reset or power-down input; see the Reset or Power-Down section of the datasheet.
27 GND power_in Ground; one of the device ground pins (4, 11, 27, 30).
28 DVDD power_in Interface power-supply pin; connect a 1-µF decoupling capacitor between pin 27 and pin 28.
29 AVDD power_in Analog power-supply pin; connect a 1-µF decoupling capacitor between pin 29 and pin 30.
30 GND power_in Ground; one of the device ground pins (4, 11, 27, 30), and the decoupling return for AVDD on pin 29.
31 REFP_A passive Positive output of reference buffer A and positive reference input for ADC_A; connect a 10-µF decoupling capacitor between pin 31 and pin 32.
32 REFM_A passive Negative output of reference buffer A and negative reference input for ADC_A; externally connect to the device GND.
33 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-32-EP(5x5)
Category Data Acquisition
Pins 33

CAD (KiCad official)

  • Symbol: ADS9224RIRHBT
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: ads9224rirhbt-etched.step / ads9224rirhbt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads9224rirhbt.step / ads9224rirhbt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (66 pp, sha256 e8405ba4f4929a21, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF