component
ADS8900BRGER
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ADS8900BRGER
Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-24-EP(4x4)
ADS8900BRGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONVST | input | Conversion start input; a CONVST rising edge moves the device from the ACQ state to the CNV state. |
| 2 | RST | input | Asynchronous reset input; a low pulse on RST resets the device and returns all register bits to their default state. |
| 3 | REFIN | passive | Reference voltage input; the datasheet specifies VREF from 2.5 V to RVDD - 0.3 V. |
| 4 | REFM | passive | Reference ground potential; the absolute maximum rating on REFM to GND is -0.1 V to 0.1 V. |
| 5 | REFBUFOUT | passive | Internal reference buffer output and external reference input; short pins 5 and 7 together. |
| 6 | NC | unconnected | No connection; float this pin with no external connection. |
| 7 | REFBUFOUT | passive | Internal reference buffer output and external reference input; short pins 5 and 7 together. |
| 8 | REFM | passive | Reference ground potential; the absolute maximum rating on REFM to GND is -0.1 V to 0.1 V. |
| 9 | AINP | passive | Positive analog input; the analog input absolute maximum range is -0.3 V to VREF + 0.3 V referenced to GND. |
| 10 | AINM | passive | Negative analog input; the analog input absolute maximum range is -0.3 V to VREF + 0.3 V referenced to GND. |
| 11 | GND | power_in | Ground reference for the device. |
| 12 | RVDD | power_in | Analog power supply pin; RVDD is specified at 3 V to 5.5 V with respect to AGND. |
| 13 | DECAP | power_out | Place the decoupling capacitor here for the internal power supply; short pin 13 and pin 14 together. |
| 14 | DECAP | power_out | Place the decoupling capacitor here for the internal power supply; short pin 13 and pin 14 together. |
| 15 | GND | power_in | Ground reference for the device. |
| 16 | DVDD | power_in | Interface power supply pin; DVDD is specified at 1.65 V to 5.5 V for operation and 2.35 V to 5.5 V for specified throughput. |
| 17 | SDO-3 | output | Serial communication data output 3; goes to Hi-Z when CS is high. |
| 18 | SDO-2 | output | Serial communication data output 2; goes to Hi-Z when CS is high. |
| 19 | SDO-1 | output | Serial communication data output 1; goes to Hi-Z when CS is high. |
| 20 | SDO-0 | output | Serial communication data output 0; goes to Hi-Z when CS is high. |
| 21 | RVS | output | Multifunction output; with CS high it reflects the internal ADCST status, and with CS low its status depends on the selected output protocol. |
| 22 | SDI | input | Serial data input used to feed data or commands into the device. |
| 23 | SCLK | input | Clock input for the serial interface; all system-synchronous data transfer protocols are timed to SCLK. |
| 24 | CS | input | Active-low chip-select input; the device takes control of the data bus when CS is low and the SDO-x pins go to Hi-Z when CS is high. |
| 25 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | ADC/DAC/Data Conversion |
| Pins | 25 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RVDD to GND | -0.3 | 7 | V | 6 | |||
| DVDD to GND | -0.3 | 7 | V | 6 | |||
| REFM to GND | -0.1 | 0.1 | V | 6 | |||
| Analog input current (AINP, AINM) to RVDD and GND | -130 | 130 | mA | 6 | |||
| Operating free-air temperature | TA | -40 | 125 | °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Analog supply voltage (RVDD to AGND) | RVDD | 3 | 5 | 5.5 | V | 6 | |
| Digital supply voltage (DVDD to AGND) operating | DVDD | 1.65 | 3 | 5.5 | V | Operating | 6 |
| Digital supply voltage (DVDD to AGND) specified throughput | DVDD | 2.35 | 3 | 5.5 | V | Specified throughput | 6 |
| Reference input voltage on REFIN | VREF | 2.5 | V | 6 | |||
| External ceramic decoupling capacitor | CREFBUF | 10 | 22 | µF | 6 | ||
| External series resistor | RESR | 0 | 1 | 1.3 | Ω | 6 | |
| Specified free-air operating temperature | TA | -40 | 25 | 125 | °C | 6 | |
| Integral nonlinearity (INL) | INL | -2 | 1 | 2 | ppm | TA = 0°C to +60°C | 8 |
| Integral nonlinearity (INL) | INL | -2.75 | 1 | 2.75 | ppm | TA = -40°C to +85°C | 8 |
| Integral nonlinearity (INL) | INL | -3.75 | 1 | 3.75 | ppm | TA = -40°C to +125°C | 8 |
| Differential nonlinearity (DNL) | DNL | -0.5 | 0.2 | 0.5 | ppm | 8 | |
| Input offset error (E(IO)) | E(IO) | -11.5 | 3 | 11.5 | ppm | TA = 25°C | 8 |
| Input offset error (E(IO)) | E(IO) | -60 | 10 | 60 | ppm | TA = -40°C to +125°C | 8 |
| Gain error (GE) | GE | -0.03 | 0.005 | 0.03 | %FSR | EN_MARG = 0b | 8 |
| Reference buffer offset voltage (VREFBUFOUT, VREF) | V(RO) | -250 | 250 | µV | With EN_MARG = 0b, TA = 25°C | 8 | |
| Margining range | -4.5 | 4.5 | mV | With EN_MARG = 1b | 8 | ||
| Reference input current | IREF | 0.1 | 1 | µA | VREF = 5 V | 8 | |
| Common-mode rejection ratio | CMRR | 80 | dB | dc to 20 kHz | 8 | ||
| Signal-to-noise + distortion (SINAD) | SINAD | 101.8 | 103.9 | dB | fIN = 2 kHz, TA = -40°C to +85°C | 9 | |
| Signal-to-noise + distortion (SINAD) | SINAD | 101.3 | 103.9 | dB | fIN = 2 kHz, TA = -40°C to +125°C | 9 | |
| Signal-to-noise ratio (SNR) | SNR | 102 | 104.5 | dB | fIN = 2 kHz, TA = -40°C to +85°C | 9 | |
| Signal-to-noise ratio (SNR) | SNR | 101.5 | 104.5 | dB | fIN = 2 kHz, TA = -40°C to +125°C | 9 | |
| Input current (digital inputs) | -0.1 | 0.01 | 0.1 | µA | 9 | ||
| Analog supply current (ADS8900B, 1-MSPS) | IRVDD | 4.2 | 5.8 | mA | ADS8900B at RVDD = 5 V, 1-MSPS | 9 | |
| Power dissipation (ADS8900B, 1-MSPS) | PRVDD | 21 | 29 | mW | ADS8900B at RVDD = 5 V, 1-MSPS | 9 | |
| Conversion time | tconv | 600 | 670 | ns | ADS8900B | 11 | |
| ADC cycle-time period | tcycle | 1 | µs | ADS8900B | 10 | ||
| Pulse duration: CONVST high | twh_CONVST | 30 | ns | 10 | |||
| Pulse duration: CONVST low | twl_CONVST | 30 | ns | 10 | |||
| Quiet acquisition time | tqt_acq | 30 | ns | 10 | |||
| Quiet aperture time | td_cnvcap | 20 | ns | 10 | |||
| Pulse duration: RST low | twl_RST | 100 | ns | 10 | |||
| Setup time: CS falling to the first SCLK capture edge | tsu_CSCK | 12 | ns | 10 | |||
| Setup time: SDI data valid to the SCLK capture edge | tsu_CKDI | 1.5 | ns | 10 | |||
| Hold time: SCLK capture edge to previous data valid on SDI | tht_CKDI | 1 | ns | 10 | |||
| SCLK high time | tph_CK | 0.45 | 0.55 | tCLK | 10 | ||
| SCLK low time | tpl_CK | 0.45 | 0.55 | tCLK | 10 | ||
| Serial clock frequency | fCLK | 70 | MHz | 2.35 V ≤ DVDD ≤ 5.5 V, TA = -40°C to +125°C | 10 | ||
| Delay time: RST rising to RVS rising | td_rst | 3 | ms | 11 | |||
| Power-up time for internal reference buffer | tPU_REFBUF | 10 | ms | CREFBUF = 22 µF | 11 | ||
| Delay time: CS rising to RVS rising | td_CSRDY_r | 30 | ns | After NOP operation | 11 | ||
| Delay time: CS rising to RVS rising | td_CSRDY_r | 120 | ns | After WR or RD operation | 11 | ||
| Delay time: CS falling to data enable | tden_CSDO | 9 | ns | 11 | |||
| Delay time: CS rising to SDO going to Hi-Z | tdz_CSDO | 10 | ns | 11 | |||
| Delay time: SCLK launch edge to next data valid on SDO | td_CKDO | 13 | ns | 11 | |||
| Delay time: CS falling to RVS falling | td_CSRDY_f | 12 | ns | 11 | |||
| Time offset: RVS falling to next data valid on SDO | toff_STRDO_f | -2 | 2 | ns | 11 | ||
| Time offset: RVS rising to next data valid on SDO | toff_STRDO_r | -2 | 2 | ns | 11 | ||
| Delay time: CS falling to RVS rising | td_CSSTR | 15 | 50 | ns | 11 | ||
| Junction-to-ambient thermal resistance | RθJA | 31.9 | °C/W | RGE (VQFN) 24 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 29.9 | °C/W | RGE (VQFN) 24 pins | 6 | ||
| Junction-to-board thermal resistance | RθJB | 8.9 | °C/W | RGE (VQFN) 24 pins | 6 | ||
| Junction-to-top characterization parameter | ψJT | 0.3 | °C/W | RGE (VQFN) 24 pins | 6 | ||
| Junction-to-board characterization parameter | ψJB | 8.9 | °C/W | RGE (VQFN) 24 pins | 6 |
CAD (KiCad official)
- Symbol:
ADS8900BRGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
ads8900brger-etched.step/ads8900brger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads8900brger.step/ads8900brger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (79 pp, sha256
d29e80d65a5d0f64, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADS8900BRGER
**Texas Instruments** · Analog To Digital Converters (ADCs) · VQFN-24-EP(4x4)
ADS8900BRGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CONVST | input | Conversion start input; a CONVST rising edge moves the device from the ACQ state to the CNV state. |
| 2 | RST | input | Asynchronous reset input; a low pulse on RST resets the device and returns all register bits to their default state. |
| 3 | REFIN | passive | Reference voltage input; the datasheet specifies VREF from 2.5 V to RVDD - 0.3 V. |
| 4 | REFM | passive | Reference ground potential; the absolute maximum rating on REFM to GND is -0.1 V to 0.1 V. |
| 5 | REFBUFOUT | passive | Internal reference buffer output and external reference input; short pins 5 and 7 together. |
| 6 | NC | unconnected | No connection; float this pin with no external connection. |
| 7 | REFBUFOUT | passive | Internal reference buffer output and external reference input; short pins 5 and 7 together. |
| 8 | REFM | passive | Reference ground potential; the absolute maximum rating on REFM to GND is -0.1 V to 0.1 V. |
| 9 | AINP | passive | Positive analog input; the analog input absolute maximum range is -0.3 V to VREF + 0.3 V referenced to GND. |
| 10 | AINM | passive | Negative analog input; the analog input absolute maximum range is -0.3 V to VREF + 0.3 V referenced to GND. |
| 11 | GND | power_in | Ground reference for the device. |
| 12 | RVDD | power_in | Analog power supply pin; RVDD is specified at 3 V to 5.5 V with respect to AGND. |
| 13 | DECAP | power_out | Place the decoupling capacitor here for the internal power supply; short pin 13 and pin 14 together. |
| 14 | DECAP | power_out | Place the decoupling capacitor here for the internal power supply; short pin 13 and pin 14 together. |
| 15 | GND | power_in | Ground reference for the device. |
| 16 | DVDD | power_in | Interface power supply pin; DVDD is specified at 1.65 V to 5.5 V for operation and 2.35 V to 5.5 V for specified throughput. |
| 17 | SDO-3 | output | Serial communication data output 3; goes to Hi-Z when CS is high. |
| 18 | SDO-2 | output | Serial communication data output 2; goes to Hi-Z when CS is high. |
| 19 | SDO-1 | output | Serial communication data output 1; goes to Hi-Z when CS is high. |
| 20 | SDO-0 | output | Serial communication data output 0; goes to Hi-Z when CS is high. |
| 21 | RVS | output | Multifunction output; with CS high it reflects the internal ADCST status, and with CS low its status depends on the selected output protocol. |
| 22 | SDI | input | Serial data input used to feed data or commands into the device. |
| 23 | SCLK | input | Clock input for the serial interface; all system-synchronous data transfer protocols are timed to SCLK. |
| 24 | CS | input | Active-low chip-select input; the device takes control of the data bus when CS is low and the SDO-x pins go to Hi-Z when CS is high. |
| 25 | Thermal pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | ADC/DAC/Data Conversion |
| Pins | 25 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| RVDD to GND | | -0.3 | | 7 | V | | 6 |
| DVDD to GND | | -0.3 | | 7 | V | | 6 |
| REFM to GND | | -0.1 | | 0.1 | V | | 6 |
| Analog input current (AINP, AINM) to RVDD and GND | | -130 | | 130 | mA | | 6 |
| Operating free-air temperature | TA | -40 | | 125 | °C | | 6 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 6 |
| Analog supply voltage (RVDD to AGND) | RVDD | 3 | 5 | 5.5 | V | | 6 |
| Digital supply voltage (DVDD to AGND) operating | DVDD | 1.65 | 3 | 5.5 | V | Operating | 6 |
| Digital supply voltage (DVDD to AGND) specified throughput | DVDD | 2.35 | 3 | 5.5 | V | Specified throughput | 6 |
| Reference input voltage on REFIN | VREF | 2.5 | | | V | | 6 |
| External ceramic decoupling capacitor | CREFBUF | 10 | | 22 | µF | | 6 |
| External series resistor | RESR | 0 | 1 | 1.3 | Ω | | 6 |
| Specified free-air operating temperature | TA | -40 | 25 | 125 | °C | | 6 |
| Integral nonlinearity (INL) | INL | -2 | 1 | 2 | ppm | TA = 0°C to +60°C | 8 |
| Integral nonlinearity (INL) | INL | -2.75 | 1 | 2.75 | ppm | TA = -40°C to +85°C | 8 |
| Integral nonlinearity (INL) | INL | -3.75 | 1 | 3.75 | ppm | TA = -40°C to +125°C | 8 |
| Differential nonlinearity (DNL) | DNL | -0.5 | 0.2 | 0.5 | ppm | | 8 |
| Input offset error (E(IO)) | E(IO) | -11.5 | 3 | 11.5 | ppm | TA = 25°C | 8 |
| Input offset error (E(IO)) | E(IO) | -60 | 10 | 60 | ppm | TA = -40°C to +125°C | 8 |
| Gain error (GE) | GE | -0.03 | 0.005 | 0.03 | %FSR | EN_MARG = 0b | 8 |
| Reference buffer offset voltage (VREFBUFOUT, VREF) | V(RO) | -250 | | 250 | µV | With EN_MARG = 0b, TA = 25°C | 8 |
| Margining range | | -4.5 | | 4.5 | mV | With EN_MARG = 1b | 8 |
| Reference input current | IREF | | 0.1 | 1 | µA | VREF = 5 V | 8 |
| Common-mode rejection ratio | CMRR | 80 | | | dB | dc to 20 kHz | 8 |
| Signal-to-noise + distortion (SINAD) | SINAD | 101.8 | 103.9 | | dB | fIN = 2 kHz, TA = -40°C to +85°C | 9 |
| Signal-to-noise + distortion (SINAD) | SINAD | 101.3 | 103.9 | | dB | fIN = 2 kHz, TA = -40°C to +125°C | 9 |
| Signal-to-noise ratio (SNR) | SNR | 102 | 104.5 | | dB | fIN = 2 kHz, TA = -40°C to +85°C | 9 |
| Signal-to-noise ratio (SNR) | SNR | 101.5 | 104.5 | | dB | fIN = 2 kHz, TA = -40°C to +125°C | 9 |
| Input current (digital inputs) | | -0.1 | 0.01 | 0.1 | µA | | 9 |
| Analog supply current (ADS8900B, 1-MSPS) | IRVDD | | 4.2 | 5.8 | mA | ADS8900B at RVDD = 5 V, 1-MSPS | 9 |
| Power dissipation (ADS8900B, 1-MSPS) | PRVDD | | 21 | 29 | mW | ADS8900B at RVDD = 5 V, 1-MSPS | 9 |
| Conversion time | tconv | 600 | | 670 | ns | ADS8900B | 11 |
| ADC cycle-time period | tcycle | 1 | | | µs | ADS8900B | 10 |
| Pulse duration: CONVST high | twh_CONVST | 30 | | | ns | | 10 |
| Pulse duration: CONVST low | twl_CONVST | 30 | | | ns | | 10 |
| Quiet acquisition time | tqt_acq | 30 | | | ns | | 10 |
| Quiet aperture time | td_cnvcap | 20 | | | ns | | 10 |
| Pulse duration: RST low | twl_RST | 100 | | | ns | | 10 |
| Setup time: CS falling to the first SCLK capture edge | tsu_CSCK | 12 | | | ns | | 10 |
| Setup time: SDI data valid to the SCLK capture edge | tsu_CKDI | 1.5 | | | ns | | 10 |
| Hold time: SCLK capture edge to previous data valid on SDI | tht_CKDI | 1 | | | ns | | 10 |
| SCLK high time | tph_CK | 0.45 | | 0.55 | tCLK | | 10 |
| SCLK low time | tpl_CK | 0.45 | | 0.55 | tCLK | | 10 |
| Serial clock frequency | fCLK | | | 70 | MHz | 2.35 V ≤ DVDD ≤ 5.5 V, TA = -40°C to +125°C | 10 |
| Delay time: RST rising to RVS rising | td_rst | | | 3 | ms | | 11 |
| Power-up time for internal reference buffer | tPU_REFBUF | | | 10 | ms | CREFBUF = 22 µF | 11 |
| Delay time: CS rising to RVS rising | td_CSRDY_r | | | 30 | ns | After NOP operation | 11 |
| Delay time: CS rising to RVS rising | td_CSRDY_r | | | 120 | ns | After WR or RD operation | 11 |
| Delay time: CS falling to data enable | tden_CSDO | | | 9 | ns | | 11 |
| Delay time: CS rising to SDO going to Hi-Z | tdz_CSDO | | | 10 | ns | | 11 |
| Delay time: SCLK launch edge to next data valid on SDO | td_CKDO | | | 13 | ns | | 11 |
| Delay time: CS falling to RVS falling | td_CSRDY_f | | | 12 | ns | | 11 |
| Time offset: RVS falling to next data valid on SDO | toff_STRDO_f | -2 | | 2 | ns | | 11 |
| Time offset: RVS rising to next data valid on SDO | toff_STRDO_r | -2 | | 2 | ns | | 11 |
| Delay time: CS falling to RVS rising | td_CSSTR | 15 | | 50 | ns | | 11 |
| Junction-to-ambient thermal resistance | RθJA | | 31.9 | | °C/W | RGE (VQFN) 24 pins | 6 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 29.9 | | °C/W | RGE (VQFN) 24 pins | 6 |
| Junction-to-board thermal resistance | RθJB | | 8.9 | | °C/W | RGE (VQFN) 24 pins | 6 |
| Junction-to-top characterization parameter | ψJT | | 0.3 | | °C/W | RGE (VQFN) 24 pins | 6 |
| Junction-to-board characterization parameter | ψJB | | 8.9 | | °C/W | RGE (VQFN) 24 pins | 6 |
## CAD (KiCad official)
- Symbol: `ADS8900BRGER`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `ads8900brger-etched.step` / `ads8900brger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8900brger.step` / `ads8900brger.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ads8900b.pdf) (79 pp, sha256 `d29e80d65a5d0f64`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ads8900brger-datasheet.pdf)