component
ADS8695IPWR
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Texas Instruments Analog To Digital Converters (ADC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# ADS8695IPWR++**Texas Instruments** · Analog To Digital Converters (ADC) · TSSOP-16++ADS8695IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DGND | power_in | Digital ground pin; decouple with DVDD pin. |+| 2 | AVDD | power_in | Analog supply pin; 4.75 V to 5.25 V rated, decouple with AGND pin. |+| 3 | AGND | power_in | Analog ground pin; decouple with AVDD pin. |+| 4 | REFIO | bidirectional | Internal reference output (4.096 V ±0.002 V) when INTREF_DIS = 0 or external reference input (4.046 V to 4.146 V) when INTREF_DIS = 1; decouple with REFGND. |+| 5 | REFGND | power_in | Reference ground pin; short to analog ground plane, decouple with REFIO and REFCAP pins. |+| 6 | REFCAP | output | ADC reference buffer output node; requires 10 µF minimum decoupling capacitor to REFGND (-0.3 V to 5.7 V absolute maximum). |+| 7 | AIN_P | input | Analog input positive terminal; supports ±2.56 V to ±12.288 V bipolar or 0 V to 12.288 V unipolar ranges with ≥1 MΩ input impedance. |+| 8 | AIN_GND | input | Analog input negative terminal; ±0.1 V operating range with ≥1 MΩ input impedance, decouple with AIN_P pin. |+| 9 | RST | input | Active low asynchronous reset input; minimum pulse duration 100 ns, configurable as power-on reset or application reset. |+| 10 | SDI | input | Serial data input pin for SPI-compatible communication or daisy-chain data input in daisy-chain mode. |+| 11 | CONVST/CS | input | Dual-function pin: active high conversion start or active low chip-select; device takes control of data bus when CS low, SDO-x pins tri-state when CS high. |+| 12 | SCLK | input | Serial clock input for SPI-compatible protocols; supports up to 66.67 MHz for all data transfer protocols. |+| 13 | SDO-0 | tri_state | Serial data output bit 0; actively driven when CONVST/CS low, tri-stated when CONVST/CS high. |+| 14 | ALARM/SDO-1/GPO | tri_state | Multi-function output: active high alarm flag, serial data output 1 (dual SDO mode), or general-purpose output; tri-state capability when configured as SDO-1. |+| 15 | RVS | output | Serial interface status output; reflects internal ADCST signal when CS high or provides source-synchronous clock for SRC protocols. |+| 16 | DVDD | power_in | Digital supply pin; 1.65 V to AVDD operating range (2.7 V to AVDD for specified performance), decouple with DGND pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `ADS8695IPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `ads8695ipwr-etched.step` / `ads8695ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8695ipwr.step` / `ads8695ipwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads8691) (75 pp, sha256 `fb9e54e4166b8c0b`, retrieved 2026-09-27, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads8695ipwr-datasheet.pdf)
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decouple with DVDD pin."+ },+ {+ "number": "2",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog supply pin; 4.75 V to 5.25 V rated, decouple with AGND pin."+ },+ {+ "number": "3",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; decouple with AVDD pin."+ },+ {+ "number": "4",+ "name": "REFIO",+ "type": "bidirectional",+ "description": "Internal reference output (4.096 V ±0.002 V) when INTREF_DIS = 0 or external reference input (4.046 V to 4.146 V) when INTREF_DIS = 1; decouple with REFGND."+ },+ {+ "number": "5",+ "name": "REFGND",+ "type": "power_in",+ "description": "Reference ground pin; short to analog ground plane, decouple with REFIO and REFCAP pins."+ },+ {+ "number": "6",+ "name": "REFCAP",+ "type": "output",+ "description": "ADC reference buffer output node; requires 10 µF minimum decoupling capacitor to REFGND (-0.3 V to 5.7 V absolute maximum)."+ },+ {+ "number": "7",+ "name": "AIN_P",+ "type": "input",+ "description": "Analog input positive terminal; supports ±2.56 V to ±12.288 V bipolar or 0 V to 12.288 V unipolar ranges with ≥1 MΩ input impedance."+ },+ {+ "number": "8",+ "name": "AIN_GND",+ "type": "input",+ "description": "Analog input negative terminal; ±0.1 V operating range with ≥1 MΩ input impedance, decouple with AIN_P pin."+ },+ {+ "number": "9",+ "name": "RST",+ "type": "input",+ "description": "Active low asynchronous reset input; minimum pulse duration 100 ns, configurable as power-on reset or application reset."+ },+ {+ "number": "10",+ "name": "SDI",+ "type": "input",+ "description": "Serial data input pin for SPI-compatible communication or daisy-chain data input in daisy-chain mode."+ },+ {+ "number": "11",+ "name": "CONVST/CS",+ "type": "input",+ "description": "Dual-function pin: active high conversion start or active low chip-select; device takes control of data bus when CS low, SDO-x pins tri-state when CS high."+ },+ {+ "number": "12",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input for SPI-compatible protocols; supports up to 66.67 MHz for all data transfer protocols."+ },+ {+ "number": "13",+ "name": "SDO-0",+ "type": "tri_state",+ "description": "Serial data output bit 0; actively driven when CONVST/CS low, tri-stated when CONVST/CS high."+ },+ {+ "number": "14",+ "name": "ALARM/SDO-1/GPO",+ "type": "tri_state",+ "description": "Multi-function output: active high alarm flag, serial data output 1 (dual SDO mode), or general-purpose output; tri-state capability when configured as SDO-1."+ },+ {+ "number": "15",+ "name": "RVS",+ "type": "output",+ "description": "Serial interface status output; reflects internal ADCST signal when CS high or provides source-synchronous clock for SRC protocols."+ },+ {+ "number": "16",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital supply pin; 1.65 V to AVDD operating range (2.7 V to AVDD for specified performance), decouple with DGND pin."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 75,+ "cost_usd": 0.5984,+ "at": "2026-09-27T05:44:42"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ads8691",+ "pages": 75,+ "sha256": "fb9e54e4166b8c0b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}