component
ADS8695IPWR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS8695IPWR
Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16
ADS8695IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DGND | power_in | Digital ground pin; decouple with DVDD pin. |
| 2 | AVDD | power_in | Analog supply pin; 4.75 V to 5.25 V rated, decouple with AGND pin. |
| 3 | AGND | power_in | Analog ground pin; decouple with AVDD pin. |
| 4 | REFIO | bidirectional | Internal reference output (4.096 V ±0.002 V) when INTREF_DIS = 0 or external reference input (4.046 V to 4.146 V) when INTREF_DIS = 1; decouple with REFGND. |
| 5 | REFGND | power_in | Reference ground pin; short to analog ground plane, decouple with REFIO and REFCAP pins. |
| 6 | REFCAP | output | ADC reference buffer output node; requires 10 µF minimum decoupling capacitor to REFGND (-0.3 V to 5.7 V absolute maximum). |
| 7 | AIN_P | input | Analog input positive terminal; supports ±2.56 V to ±12.288 V bipolar or 0 V to 12.288 V unipolar ranges with ≥1 MΩ input impedance. |
| 8 | AIN_GND | input | Analog input negative terminal; ±0.1 V operating range with ≥1 MΩ input impedance, decouple with AIN_P pin. |
| 9 | RST | input | Active low asynchronous reset input; minimum pulse duration 100 ns, configurable as power-on reset or application reset. |
| 10 | SDI | input | Serial data input pin for SPI-compatible communication or daisy-chain data input in daisy-chain mode. |
| 11 | CONVST/CS | input | Dual-function pin: active high conversion start or active low chip-select; device takes control of data bus when CS low, SDO-x pins tri-state when CS high. |
| 12 | SCLK | input | Serial clock input for SPI-compatible protocols; supports up to 66.67 MHz for all data transfer protocols. |
| 13 | SDO-0 | tri_state | Serial data output bit 0; actively driven when CONVST/CS low, tri-stated when CONVST/CS high. |
| 14 | ALARM/SDO-1/GPO | tri_state | Multi-function output: active high alarm flag, serial data output 1 (dual SDO mode), or general-purpose output; tri-state capability when configured as SDO-1. |
| 15 | RVS | output | Serial interface status output; reflects internal ADCST signal when CS high or provides source-synchronous clock for SRC protocols. |
| 16 | DVDD | power_in | Digital supply pin; 1.65 V to AVDD operating range (2.7 V to AVDD for specified performance), decouple with DGND pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
ADS8695IPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ads8695ipwr-etched.step/ads8695ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads8695ipwr.step/ads8695ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (75 pp, sha256
fb9e54e4166b8c0b, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).