component
ADS8598HIPM
Public Made by Adomby adom
Texas Instruments Pre-ordered Products, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
| docs | 3d ago |
| viewers | 3d ago |
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| ads8598hipm-etched.step | 3d ago |
| ads8598hipm-hero.glb | 3d ago |
| ads8598hipm-hero.overlay.json | 3d ago |
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ADS8598HIPM
Texas Instruments · Pre-ordered Products · LQFP-64(10x10)
ADS8598HIPM from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to the closest AGND pins. |
| 2 | AGND | power_in | Analog ground pin. |
| 3 | OS0 | input | Oversampling mode control pin, LSB of OS[2:0]. |
| 4 | OS1 | input | Oversampling mode control pin, middle bit of OS[2:0]. |
| 5 | OS2 | input | Oversampling mode control pin, MSB of OS[2:0]. |
| 6 | PAR/SER/BYTE_SEL | input | Logic input selecting parallel (low), or serial/parallel byte (high, chosen by DB15/BYTE SEL) interface mode. |
| 7 | STBY | input | Active-low logic input that puts the device into standby or shutdown mode, selected by the RANGE pin. |
| 8 | RANGE | input | Selects the ±10 V (high) or ±5 V (low) input range when STBY is high, and selects standby or shutdown when STBY is low. |
| 9 | CONVSTA | input | Active-high logic input controlling start of conversion for channels 1-4. |
| 10 | CONVSTB | input | Active-high logic input controlling start of conversion for channels 5-8. |
| 11 | RESET | input | Active-high logic input that resets the device digital logic. |
| 12 | RD/SCLK | input | Active-low read input in parallel and parallel byte modes, and clock input in serial mode. |
| 13 | CS | input | Active-low chip-select input; a rising edge puts the data lines in tri-state. |
| 14 | BUSY | output | Active-high digital output indicating a conversion is in progress. |
| 15 | FRSTDATA | output | Active-high digital output indicating data from channel 1 is being read back. |
| 16 | DB0 | output | Data output DB0 (LSB) in parallel interface mode. |
| 17 | DB1 | output | Data output DB1 in parallel interface mode. |
| 18 | DB2 | output | Data output DB2 in parallel interface mode. |
| 19 | DB3 | output | Data output DB3 in parallel interface mode. |
| 20 | DB4 | output | Data output DB4 in parallel interface mode. |
| 21 | DB5 | output | Data output DB5 in parallel interface mode. |
| 22 | DB6 | output | Data output DB6 in parallel interface mode. |
| 23 | DVDD | power_in | Digital supply pin (2.3 V to AVDD); decouple with AGND on pin 26. |
| 24 | DB7/DOUTA | output | Data output DB7 in parallel and parallel byte modes, and serial data output in serial mode. |
| 25 | DB8/DOUTB | output | Data output DB8 in parallel mode, and serial data output in serial mode. |
| 26 | AGND | power_in | Analog ground pin; DVDD is decoupled to it. |
| 27 | DB9 | output | Data output DB9 in parallel interface mode. |
| 28 | DB10 | output | Data output DB10 in parallel interface mode. |
| 29 | DB11 | output | Data output DB11 in parallel interface mode. |
| 30 | DB12 | output | Data output DB12 in parallel interface mode. |
| 31 | DB13 | output | Data output DB13 in parallel interface mode. |
| 32 | DB14/HBEN | bidirectional | Data output DB14 in parallel mode, and byte-order select input in parallel byte mode. |
| 33 | DB15/BYTE_SEL | bidirectional | Data output DB15 (MSB) in parallel mode, and active-high input enabling parallel byte mode when PAR/SER/BYTE SEL is high. |
| 34 | REFSEL | input | Active-high logic input enabling the internal reference; low selects an external reference. |
| 35 | AGND | power_in | Analog ground pin. |
| 36 | REGCAP1 | output | Internal voltage regulator output 1; decouple separately to AGND with a 1-µF capacitor. |
| 37 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to the closest AGND pins. |
| 38 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to the closest AGND pins. |
| 39 | REGCAP2 | output | Internal voltage regulator output 2; decouple separately to AGND with a 1-µF capacitor. |
| 40 | AGND | power_in | Analog ground pin. |
| 41 | AGND | power_in | Analog ground pin. |
| 42 | REFIN/REFOUT | bidirectional | Internal reference output when REFSEL is high, or external reference input when REFSEL is low; decouple to REFGND with a 10-µF capacitor. |
| 43 | REFGND | power_in | Reference ground; short to the analog ground plane and decouple with REFIN/REFOUT using a 10-µF capacitor. |
| 44 | REFCAPA | output | Reference amplifier output; short to REFCAPB and decouple to AGND with a low-ESR 10-µF ceramic capacitor. |
| 45 | REFCAPB | output | Reference amplifier output; short to REFCAPA and decouple to AGND with a low-ESR 10-µF ceramic capacitor. |
| 46 | REFGND | power_in | Reference ground; short to the analog ground plane. |
| 47 | AGND | power_in | Analog ground pin. |
| 48 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to the closest AGND pins. |
| 49 | AIN_1P | input | Analog input channel 1: positive input. |
| 50 | AIN_1GND | input | Analog input channel 1: negative input. |
| 51 | AIN_2P | input | Analog input channel 2: positive input. |
| 52 | AIN_2GND | input | Analog input channel 2: negative input. |
| 53 | AIN_3P | input | Analog input channel 3: positive input. |
| 54 | AIN_3GND | input | Analog input channel 3: negative input. |
| 55 | AIN_4P | input | Analog input channel 4: positive input. |
| 56 | AIN_4GND | input | Analog input channel 4: negative input. |
| 57 | AIN_5P | input | Analog input channel 5: positive input. |
| 58 | AIN_5GND | input | Analog input channel 5: negative input. |
| 59 | AIN_6P | input | Analog input channel 6: positive input. |
| 60 | AIN_6GND | input | Analog input channel 6: negative input. |
| 61 | AIN_7P | input | Analog input channel 7: positive input. |
| 62 | AIN_7GND | input | Analog input channel 7: negative input. |
| 63 | AIN_8P | input | Analog input channel 8: positive input. |
| 64 | AIN_8GND | input | Analog input channel 8: negative input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Solders / Accessories / Batteries |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
ADS8598HIPM - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
ads8598hipm-etched.step/ads8598hipm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads8598hipm.step/ads8598hipm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (67 pp, sha256
94d40a1915080df9, retrieved 2026-10-30, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).