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Contents

README

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ADS8513IBDW

Texas Instruments · Analog To Digital Converters (ADC) · SOIC-16-300mil

ADS8513IBDW from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R1IN input Analog input whose allowed range and input impedance depend on how it is connected per Table 1, and which tolerates ±25V per the absolute maximum ratings.
2 GND power_in Ground pin; the datasheet specifies ground voltage differences limited to ±0.3V.
3 R2IN input Analog input whose allowed range and input impedance depend on how it is connected per Table 1, and which tolerates ±25V per the absolute maximum ratings.
4 R3IN input Analog input whose allowed range and input impedance depend on how it is connected per Table 1, and which tolerates ±25V per the absolute maximum ratings.
5 BUF output Reference buffer output that must be connected to R1IN, R2IN, or R3IN as needed for the selected input range.
6 CAP passive Reference buffer compensation node that should be decoupled to ground with a 1µF tantalum capacitor in parallel with a 0.01µF ceramic capacitor.
7 REF bidirectional Reference input/output that outputs the internal 2.5V reference through a series 4kΩ resistor, should be decoupled with 1µF to 2.2µF tantalum to ground, and is overridden if an external reference voltage is applied.
8 GND power_in Ground pin; the datasheet specifies ground voltage differences limited to ±0.3V.
9 DATACLK bidirectional Serial data clock that is an output providing the synchronous clock when EXT/INT is low (3-stated when CS is high) and an input requiring an external clock when EXT/INT is high.
10 DATA output Serial data output carrying the result of the last completed conversion, synchronized to DATACLK, and 3-stated when CS is high.
11 EXT/INT input Selects the DATACLK source: high requires an externally supplied serial clock, low derives the clock from the internal conversion clock.
12 CONV input A falling edge places the sample/hold in hold and starts a conversion regardless of CS state, and is ignored if a conversion is already in progress.
13 CS input Chip select that 3-states DATA, BUSY, and DATACLK (when EXT/INT is low) when high and enables all outputs when low.
14 BUSY output Goes low when a conversion starts and remains low throughout the conversion, and is 3-stated when CS is high.
15 PWRD input When high, places most of the device circuitry in a low-power mode, with PWRD and REFD high limited to 50µW maximum.
16 VS power_in +5V supply input, specified at 4.75V to 5.25V, decoupled with a 0.1µF ceramic capacitor in parallel with a 10µF tantalum capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: ADS8513IBDW
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ads8513ibdw-etched.step / ads8513ibdw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8513ibdw.step / ads8513ibdw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 2b133af50234f381, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF