component
ADS8509IDWR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADCs), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"pins": [
{
"number": "1",
"name": "R1IN",
"type": "input",
"description": "Analog input; see Table 2 for input range connections, with an absolute maximum rating of ±25 V."
},
{
"number": "2",
"name": "AGND1",
"type": "power_in",
"description": "Analog ground used internally as the ground reference point, with minimal current flow."
},
{
"number": "3",
"name": "R2IN",
"type": "input",
"description": "Analog input; see Table 2 for input range connections, with an absolute maximum rating of ±25 V."
},
{
"number": "4",
"name": "R3IN",
"type": "input",
"description": "Analog input; see Table 2 for input range connections, with an absolute maximum rating of ±25 V."
},
{
"number": "5",
"name": "CAP",
"type": "passive",
"description": "Reference buffer capacitor, specified as 2.2-µF tantalum to ground (printed as 2.2-mF in the source)."
},
{
"number": "6",
"name": "REF",
"type": "bidirectional",
"description": "Reference input/output that outputs the internal 2.5-V reference or accepts an external reference (2.3 V to 2.7 V for specified linearity), bypassed to ground with a 2.2-µF tantalum capacitor."
},
{
"number": "7",
"name": "AGND2",
"type": "power_in",
"description": "Analog ground."
},
{
"number": "8",
"name": "SB/BTC",
"type": "input",
"description": "Selects the data output format: high gives straight binary and low gives binary 2's complement."
},
{
"number": "9",
"name": "EXT/INT",
"type": "input",
"description": "Selects the external clock (high, data synchronized to DATACLK input) or internal clock (low, a convert command starts data transmission with 16 clock pulses on DATACLK) for transmitting data."
},
{
"number": "10",
"name": "DGND",
"type": "power_in",
"description": "Digital ground."
},
{
"number": "11",
"name": "SYNC",
"type": "output",
"description": "Sync output that supplies a data synchronization pulse when EXT is high and at least one external clock pulse has occurred while not in read mode."
},
{
"number": "12",
"name": "DATACLK",
"type": "bidirectional",
"description": "Input or output depending on the EXT/INT level; output data is synchronized to this clock, and when EXT/INT is low it transmits 16 pulses after each conversion and stays low between conversions."
},
{
"number": "13",
"name": "DATA",
"type": "output",
"description": "Serial data output synchronized to DATACLK, with format set by SB/BTC; in external clock mode it outputs the TAG level after 16 bits while CS is low and R/C is high."
},
{
"number": "14",
"name": "TAG",
"type": "input",
"description": "Tag input for external clock mode; when EXT is high, digital data from TAG is output on DATA with a delay that depends on the external clock mode."
},
{
"number": "15",
"name": "R/C",
"type": "input",
"description": "Read/convert input; with CS low, a falling edge puts the sample-and-hold into hold and starts a conversion, and it also starts data transmission when EXT/INT is low."
},
{
"number": "16",
"name": "CS",
"type": "input",
"description": "Chip select, internally ORed with R/C."
},
{
"number": "17",
"name": "BUSY",
"type": "output",
"description": "Busy output that falls when a conversion starts and remains low until the conversion is complete and the data is latched into the output shift register."
},
{
"number": "18",
"name": "PWRD",
"type": "input",
"description": "Power-down input; when high, conversions are inhibited and power consumption is significantly reduced, with previous results held in the output shift register."
},
{
"number": "19",
"name": "VANA",
"type": "power_in",
"description": "Analog supply input, nominally +5 V (absolute maximum 6 V); connect directly to pin 20 and decouple to ground with 0.1-µF ceramic and 10-µF tantalum capacitors."
},
{
"number": "20",
"name": "VDIG",
"type": "power_in",
"description": "Digital supply input, nominally +5 V (absolute maximum 6 V); connect directly to pin 19 and keep at or below VANA."
}
],
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"extractor flagged: The DW pin numbers were taken from the Terminal Functions table (DW NO. column) on page 6, because t; The CAP capacitor value is printed as '2.2-mF' in the source, likely an OCR rendering of 2.2 µF. It ; The Terminal Functions table gives no DW pin number for EXT/INT, SB/BTC, CAP, REF, AGND1, AGND2 or D"
],
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