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ADS8505IDWR

Texas Instruments · Analog To Digital Converters (ADC) · SOIC-28-300mil

ADS8505IDWR from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Analog input with a ±10-V input range (see Figure 28 of the datasheet).
2 AGND1 power_in Analog ground, used internally as the ground reference point.
3 REF bidirectional Reference input/output; requires a 2.2-µF tantalum capacitor to ground.
4 CAP passive Reference buffer capacitor; requires a 2.2-µF tantalum capacitor to ground.
5 AGND2 power_in Analog ground; ground voltage differences between DGND, AGND1 and AGND2 are limited to ±0.3 V.
6 D15 (MSB) tri_state Data bit 15, the most significant bit of the conversion result; high-impedance when CS is high or R/C is low.
7 D14 tri_state Data bit 14; high-impedance when CS is high or R/C is low.
8 D13 tri_state Data bit 13; high-impedance when CS is high or R/C is low.
9 D12 tri_state Data bit 12; high-impedance when CS is high or R/C is low.
10 D11 tri_state Data bit 11; high-impedance when CS is high or R/C is low.
11 D10 tri_state Data bit 10; high-impedance when CS is high or R/C is low.
12 D9 tri_state Data bit 9; high-impedance when CS is high or R/C is low.
13 D8 tri_state Data bit 8; high-impedance when CS is high or R/C is low.
14 DGND power_in Digital ground.
15 D7 tri_state Data bit 7; high-impedance when CS is high or R/C is low.
16 D6 tri_state Data bit 6; high-impedance when CS is high or R/C is low.
17 D5 tri_state Data bit 5; high-impedance when CS is high or R/C is low.
18 D4 tri_state Data bit 4; high-impedance when CS is high or R/C is low.
19 D3 tri_state Data bit 3; high-impedance when CS is high or R/C is low.
20 D2 tri_state Data bit 2; high-impedance when CS is high or R/C is low.
21 D1 tri_state Data bit 1; high-impedance when CS is high or R/C is low.
22 D0 (LSB) tri_state Data bit 0, the least significant bit of the conversion result; high-impedance when CS is high or R/C is low.
23 BYTE input Selects the 8 most significant bits (low) or the 8 least significant bits (high) for output.
24 R/C input With CS low and BUSY high, a falling edge starts a new conversion; with CS low, a rising edge enables the parallel output.
25 CS input Internally ORed with R/C; with R/C low, a falling edge on CS starts a new conversion.
26 BUSY output Goes low at the start of a conversion and stays low until the conversion is complete and the digital outputs are updated.
27 VANA power_in Analog supply input, nominally +5 V; decouple to ground with 0.1-µF ceramic and 10-µF tantalum capacitors.
28 VDIG power_in Digital supply input, nominally +5 V; connect directly to pin 27 and keep it at or below VANA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-28-300mil
Category Data Acquisition
Pins 28

CAD (KiCad official)

  • Symbol: ADS8505IDWR
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: ads8505idwr-etched.step / ads8505idwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8505idwr.step / ads8505idwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 2dd1a92c2d7ac740, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF