component
ADS8505IDW
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+64@@ -0,0 +1,64 @@+# ADS8505IDW++**Texas Instruments** · Analog To Digital Converters (ADC) · SOIC-28-300mil++ADS8505IDW from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VIN | power_in | Analog input; ±10-V input range with 11.5 kΩ impedance. |+| 2 | AGND1 | power_in | Analog ground; serves as internal ground reference point. |+| 3 | REF | passive | Reference input/output for 2.5-V internal reference; requires 2.2-µF Tantalum capacitor to ground. |+| 4 | CAP | passive | Reference buffer capacitor node; connect 2.2-µF Tantalum capacitor to ground. |+| 5 | AGND2 | power_in | Analog ground. |+| 6 | D15 | tri_state | Data bit 15 (MSB) output in 2's complement format; high-impedance state when CS high or R/C low. |+| 7 | D14 | tri_state | Data bit 14 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 8 | D13 | tri_state | Data bit 13 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 9 | D12 | tri_state | Data bit 12 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 10 | D11 | tri_state | Data bit 11 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 11 | D10 | tri_state | Data bit 10 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 12 | D9 | tri_state | Data bit 9 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 13 | D8 | tri_state | Data bit 8 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 14 | DGND | power_in | Digital ground. |+| 15 | D7 | tri_state | Data bit 7 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 16 | D6 | tri_state | Data bit 6 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 17 | D5 | tri_state | Data bit 5 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 18 | D4 | tri_state | Data bit 4 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 19 | D3 | tri_state | Data bit 3 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 20 | D2 | tri_state | Data bit 2 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 21 | D1 | tri_state | Data bit 1 output in 2's complement format; high-impedance state when CS high or R/C low. |+| 22 | D0 | tri_state | Data bit 0 (LSB) output in 2's complement format; high-impedance state when CS high or R/C low. |+| 23 | BYTE | input | Byte select input; selects 8 MSB (low) or 8 LSB (high) from 16-bit conversion result. |+| 24 | R/C | input | Read/Convert input; falling edge with CS low initiates conversion, rising edge with CS low enables parallel output. |+| 25 | CS | input | Chip select input internally ORed with R/C; falling edge with R/C low initiates new conversion. |+| 26 | BUSY | output | Status output; goes low at conversion start and returns high when conversion complete and outputs updated. |+| 27 | VANA | power_in | Analog supply input nominally +5 V; decouple with 0.1-µF ceramic and 10-µF tantalum capacitors to ground. |+| 28 | VDIG | power_in | Digital supply input nominally +5 V; connect directly to pin 27 (VANA), must be ≤ VANA. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-28-300mil |+| Category | Data Acquisition |+| Pins | 28 |++## CAD (KiCad official)++- Symbol: `ADS8505IDW`+- Footprint: `Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm`+- 3D model: SOIC-28-300mil (KiCad packages3D, STEP)+- 3D model files: `ads8505idw-etched.step` / `ads8505idw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8505idw.step` / `ads8505idw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads8505) (29 pp, sha256 `2dd1a92c2d7ac740`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads8505idw-datasheet.pdf)
page.jsonadded+318@@ -0,0 +1,318 @@+{+ "slug": "ads8505idw",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "ads8505idw",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ads8505idw.kicad_sym",+ "ads8505idw.kicad_mod",+ "ads8505idw.glb",+ "ads8505idw.step",+ "ads8505idw.lbr",+ "docs/hero.png",+ "docs/ads8505idw-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ads8505idw-hero.glb",+ "ads8505idw-hero.overlay.json"+ ],+ "component": {+ "mpn": "ADS8505IDW",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-28-300mil",+ "pin_count": 28,+ "category": "Data Acquisition",+ "subcategory": "Analog To Digital Converters (ADC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ads8505",+ "parts": {+ "symbol": "ads8505idw.kicad_sym",+ "footprint": "ads8505idw.kicad_mod",+ "model_3d": "ads8505idw-hero.glb",+ "model_3d_plain": "ads8505idw.glb",+ "model_3d_step": "ads8505idw-etched.step",+ "model_3d_step_plain": "ads8505idw.step",+ "lbr": "ads8505idw.lbr"+ },+ "distributor_links": {+ "lcsc": "C2870173",+ "digikey": "296-18678-5-ND",+ "mouser": "595-ADS8505IDW"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T09:17:51Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-18678-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-ADS8505IDW",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VIN",+ "type": "power_in",+ "description": "Analog input; ±10-V input range with 11.5 kΩ impedance."+ },+ {+ "number": "2",+ "name": "AGND1",+ "type": "power_in",+ "description": "Analog ground; serves as internal ground reference point."+ },+ {+ "number": "3",+ "name": "REF",+ "type": "passive",+ "description": "Reference input/output for 2.5-V internal reference; requires 2.2-µF Tantalum capacitor to ground."+ },+ {+ "number": "4",+ "name": "CAP",+ "type": "passive",+ "description": "Reference buffer capacitor node; connect 2.2-µF Tantalum capacitor to ground."+ },+ {+ "number": "5",+ "name": "AGND2",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "6",+ "name": "D15",+ "type": "tri_state",+ "description": "Data bit 15 (MSB) output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "7",+ "name": "D14",+ "type": "tri_state",+ "description": "Data bit 14 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "8",+ "name": "D13",+ "type": "tri_state",+ "description": "Data bit 13 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "9",+ "name": "D12",+ "type": "tri_state",+ "description": "Data bit 12 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "10",+ "name": "D11",+ "type": "tri_state",+ "description": "Data bit 11 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "11",+ "name": "D10",+ "type": "tri_state",+ "description": "Data bit 10 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "12",+ "name": "D9",+ "type": "tri_state",+ "description": "Data bit 9 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "13",+ "name": "D8",+ "type": "tri_state",+ "description": "Data bit 8 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "14",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "15",+ "name": "D7",+ "type": "tri_state",+ "description": "Data bit 7 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "16",+ "name": "D6",+ "type": "tri_state",+ "description": "Data bit 6 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "17",+ "name": "D5",+ "type": "tri_state",+ "description": "Data bit 5 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "18",+ "name": "D4",+ "type": "tri_state",+ "description": "Data bit 4 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "19",+ "name": "D3",+ "type": "tri_state",+ "description": "Data bit 3 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "20",+ "name": "D2",+ "type": "tri_state",+ "description": "Data bit 2 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "21",+ "name": "D1",+ "type": "tri_state",+ "description": "Data bit 1 output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "22",+ "name": "D0",+ "type": "tri_state",+ "description": "Data bit 0 (LSB) output in 2's complement format; high-impedance state when CS high or R/C low."+ },+ {+ "number": "23",+ "name": "BYTE",+ "type": "input",+ "description": "Byte select input; selects 8 MSB (low) or 8 LSB (high) from 16-bit conversion result."+ },+ {+ "number": "24",+ "name": "R/C",+ "type": "input",+ "description": "Read/Convert input; falling edge with CS low initiates conversion, rising edge with CS low enables parallel output."+ },+ {+ "number": "25",+ "name": "CS",+ "type": "input",+ "description": "Chip select input internally ORed with R/C; falling edge with R/C low initiates new conversion."+ },+ {+ "number": "26",+ "name": "BUSY",+ "type": "output",+ "description": "Status output; goes low at conversion start and returns high when conversion complete and outputs updated."+ },+ {+ "number": "27",+ "name": "VANA",+ "type": "power_in",+ "description": "Analog supply input nominally +5 V; decouple with 0.1-µF ceramic and 10-µF tantalum capacitors to ground."+ },+ {+ "number": "28",+ "name": "VDIG",+ "type": "power_in",+ "description": "Digital supply input nominally +5 V; connect directly to pin 27 (VANA), must be ≤ VANA."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 10,+ "cost_usd": 0.1409,+ "at": "2026-10-07T09:17:34"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ads8505",+ "pages": 29,+ "sha256": "2dd1a92c2d7ac740",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 28,+ "described": 28,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ads8505idw.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 17.9,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b889a13dbe9ec59e79fa9f1b5118b00bfa54f9582392335ff3365b64afc264b1",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ads8505idw-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 17.9,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "433ecc51f824185c852bbf51d9ae2a88cecb63ef8aa7aa8340356ea2b1248333",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}