component

ADS8505IDW

Public Made by Adom

by adom

Texas Instruments Analog To Digital Converters (ADC), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata acquisitionads8505idwfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

ADS8505IDW

Texas Instruments · Analog To Digital Converters (ADC) · SOIC-28-300mil

ADS8505IDW from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Analog input; ±10-V input range with 11.5 kΩ impedance.
2 AGND1 power_in Analog ground; serves as internal ground reference point.
3 REF passive Reference input/output for 2.5-V internal reference; requires 2.2-µF Tantalum capacitor to ground.
4 CAP passive Reference buffer capacitor node; connect 2.2-µF Tantalum capacitor to ground.
5 AGND2 power_in Analog ground.
6 D15 tri_state Data bit 15 (MSB) output in 2's complement format; high-impedance state when CS high or R/C low.
7 D14 tri_state Data bit 14 output in 2's complement format; high-impedance state when CS high or R/C low.
8 D13 tri_state Data bit 13 output in 2's complement format; high-impedance state when CS high or R/C low.
9 D12 tri_state Data bit 12 output in 2's complement format; high-impedance state when CS high or R/C low.
10 D11 tri_state Data bit 11 output in 2's complement format; high-impedance state when CS high or R/C low.
11 D10 tri_state Data bit 10 output in 2's complement format; high-impedance state when CS high or R/C low.
12 D9 tri_state Data bit 9 output in 2's complement format; high-impedance state when CS high or R/C low.
13 D8 tri_state Data bit 8 output in 2's complement format; high-impedance state when CS high or R/C low.
14 DGND power_in Digital ground.
15 D7 tri_state Data bit 7 output in 2's complement format; high-impedance state when CS high or R/C low.
16 D6 tri_state Data bit 6 output in 2's complement format; high-impedance state when CS high or R/C low.
17 D5 tri_state Data bit 5 output in 2's complement format; high-impedance state when CS high or R/C low.
18 D4 tri_state Data bit 4 output in 2's complement format; high-impedance state when CS high or R/C low.
19 D3 tri_state Data bit 3 output in 2's complement format; high-impedance state when CS high or R/C low.
20 D2 tri_state Data bit 2 output in 2's complement format; high-impedance state when CS high or R/C low.
21 D1 tri_state Data bit 1 output in 2's complement format; high-impedance state when CS high or R/C low.
22 D0 tri_state Data bit 0 (LSB) output in 2's complement format; high-impedance state when CS high or R/C low.
23 BYTE input Byte select input; selects 8 MSB (low) or 8 LSB (high) from 16-bit conversion result.
24 R/C input Read/Convert input; falling edge with CS low initiates conversion, rising edge with CS low enables parallel output.
25 CS input Chip select input internally ORed with R/C; falling edge with R/C low initiates new conversion.
26 BUSY output Status output; goes low at conversion start and returns high when conversion complete and outputs updated.
27 VANA power_in Analog supply input nominally +5 V; decouple with 0.1-µF ceramic and 10-µF tantalum capacitors to ground.
28 VDIG power_in Digital supply input nominally +5 V; connect directly to pin 27 (VANA), must be ≤ VANA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-28-300mil
Category Data Acquisition
Pins 28

CAD (KiCad official)

  • Symbol: ADS8505IDW
  • Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
  • 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
  • 3D model files: ads8505idw-etched.step / ads8505idw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8505idw.step / ads8505idw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 2dd1a92c2d7ac740, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF