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ADS8328IPWR

Public Made by Adom

by adom

Texas Instruments Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersads8328ipwrfactory-2.0.0extractor-text

Verified ADS8328IPWR

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADS8328IPWR · TSSOP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 51-page datasheet
  • ✓distributor: lcsc C2670726, digikey ADS8328IPWR-ND, mouser 595-ADS8328IPWR
  • ✓family: TSSOP-16_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-topbl5sg/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.48)
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ads8328ipwr.kicad_sym✓ ads8328ipwr.kicad_mod✓ ads8328ipwr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers ads8328ipwr: viewers · Ray 3d ago
ads8328ipwr-etched.glb Publish 0.1.0 · Ray 3d ago
ads8328ipwr-etched.step ads8328ipwr: factory component page (tier=mfr) · Ray 3d ago
ads8328ipwr-hero.glb ads8328ipwr: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
ads8328ipwr-hero.overlay.json Publish 0.1.0 · Ray 3d ago
ads8328ipwr.glb Publish 0.1.0 · Ray 3d ago
ads8328ipwr.kicad_mod Publish 0.1.0 · Ray 3d ago
ads8328ipwr.kicad_sym Publish 0.1.0 · Ray 3d ago
ads8328ipwr.lbr Publish 0.1.0 · Ray 3d ago
ads8328ipwr.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 3d ago

ADS8328IPWR

Texas Instruments · Analog To Digital Converters (ADCs) · TSSOP-16

ADS8328IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +VA power_in Analog supply, +2.7 V to +5.5 VDC.
2 +IN1 input Second noninverting input.
3 +IN0 input First noninverting input.
4 COM input Common inverting input, usually connected to ground.
5 AGND power_in Analog ground.
6 REF− input Connect to AGND through an individual via.
7 REF+ (REFIN) input External reference input.
8 NC unconnected No connection.
9 CONVST input Freezes sample and hold and starts conversion with the next rising edge of the internal clock.
10 EOC/INT/CDI output Status output: if programmed as EOC it is low (default) while a conversion is in progress; if programmed as INT it is low for a preprogrammed duration after end of conversion when data are valid; polarity is programmable, and the pin can also act as chain data input (CDI) in chain mode.
11 FS/CS input Frame sync signal for TMS320 DSP serial interface or chip select input for SPI interface slave select.
12 SDI input Serial data in (conversion start and reset possible).
13 SDO output Serial data out.
14 BDGND power_in Interface ground.
15 SCLK input Clock for serial interface.
16 +VBD power_in Interface supply, 1.65 V to 1.5 × (+VA) per the features list.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Converters
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital input voltage to BDGND (upper limit +VBD + 0.3 V) -0.3 V 3
Digital output voltage to BDGND (upper limit +VBD + 0.3 V) -0.3 V 3
+VA to AGND +VA -0.3 7 V 3
+VBD to BDGND +VBD -0.3 7 V 3
+IN to AGND (upper limit +VA + 0.3 V) +IN -0.3 V 3
-IN to AGND (upper limit +VA + 0.3 V) -IN -0.3 V 3
+REF to AGND (upper limit +VA + 0.3 V) +REF -0.3 V 3
-REF to AGND -REF -0.3 0.3 V 3
AGND to BDGND -0.3 0.3 V 3
Storage temperature range Tstg -65 150 °C 3
Junction temperature (TJ max) TJ 150 °C 3
TSSOP-16 package thermal impedance qJA 86 °C/W TSSOP-16 (PW) package 3
Operating free-air temperature range TA -40 85 °C 5
Full-scale input voltage +IN - (-IN) (upper limit +VREF) 0 V +VA = 2.7 V to 3.6 V, VREF = 2.5 V 4
Absolute input voltage +IN, +IN0, +IN1 (lower limit AGND - 0.2 V; upper limit +VA + 0.2 V) -0.2 V +VA = 2.7 V to 3.6 V 4
Absolute input voltage -IN or COM (relative to AGND) -0.2 0.2 V +VA = 2.7 V to 3.6 V 4
Input capacitance 40 45 pF +VA = 2.7 V to 3.6 V 4
Input leakage current -1 1 nA No ongoing conversion, DC input; +VA = 2.7 V to 3.6 V 4
Integral linearity INL (ADS8328I) INL -3 3 LSB +VA = 2.7 V to 3.6 V 4
Differential linearity DNL (ADS8328I) DNL -1 2 LSB +VA = 2.7 V to 3.6 V 4
Offset error (ADS8328I) EO -0.8 0.8 mV +VA = 2.7 V to 3.6 V 4
Gain error EG -0.25 -0.07 0.25 %FSR +VA = 2.7 V to 3.6 V 4
Input current II -50 50 nA VI = +VBD or BDGND; +VA = 2.7 V to 3.6 V 5
Low-level input voltage VIL (lower limit -0.3 V; upper limit 0.35 x (+VBD)) VIL -0.3 V (+VA x 1.5) V >= +VBD >= 1.65 V 5
Low-level output voltage VOL VOL 0 0.4 V (+VA x 1.5) V >= +VBD >= 1.65 V, IO = 100 mA 5
Power-supply voltage +VBD (upper limit 1.5 x (+VA)) +VBD 1.65 V 5
Power-supply voltage +VA +VA 2.7 3.6 V 5
Supply current at 500-kHz sample rate 3.8 5 mA 500-kHz sample rate; +VA = 2.7 V to 3.6 V 5
Supply current NAP/Auto-NAP mode 0.2 0.4 mA NAP/Auto-NAP mode 5
Deep power-down mode supply current 2 50 nA Deep power-down mode 5
Power dissipation 10.6 14 mW +VA = 2.7 V, +VBD = 1.8 V 5
Internal conversion clock frequency 10.5 11 12.2 MHz Internal clock; +VA = 2.7 V to 3.6 V 5
External serial clock SCLK as I/O and conversion clock 1 21 MHz As I/O clock and conversion clock 5
Input reference VREF (REF+ - REF-) VREF 0.3 2.525 V 3.6 V >= +VA >= 2.7 V 5
Reference input range (REF-) - AGND -0.1 0.1 V 5
Full-scale input voltage +IN - (-IN) (upper limit +VREF) 0 V +VA = 4.5 V to 5.5 V, VREF = 4.096 V 6
Absolute input voltage +IN, +IN0, +IN1 (lower limit AGND - 0.2 V; upper limit +VA + 0.2 V) -0.2 V +VA = 4.5 V to 5.5 V 6
Absolute input voltage -IN or COM (relative to AGND) -0.2 0.2 V +VA = 4.5 V to 5.5 V 6
Input capacitance 40 45 pF +VA = 4.5 V to 5.5 V 6
Input leakage current -1 1 nA No ongoing conversion, DC input; +VA = 4.5 V to 5.5 V 6
Integral linearity INL (ADS8328I) INL -3 3 LSB +VA = 4.5 V to 5.5 V 6
Differential linearity DNL (ADS8328I) DNL -1 2 LSB +VA = 4.5 V to 5.5 V 6
Offset error (ADS8328I) EO -1.25 1.25 mV +VA = 4.5 V to 5.5 V 6
Gain error EG -0.25 -0.07 0.25 %FSR +VA = 4.5 V to 5.5 V 6
Input current II -50 50 nA VI = +VBD or BDGND; +VA = 4.5 V to 5.5 V 7
Low-level input voltage VIL (lower limit -0.3 V; upper limit 0.35 x (+VBD)) VIL -0.3 V 5.5 V >= +VBD >= 4.5 V 7
Low-level output voltage VOL VOL 0 0.4 V 5.5 V >= +VBD >= 4.5 V, IO = 100 mA 7
Power-supply voltage +VBD +VBD 1.65 3.3 5.5 V 7
Power-supply voltage +VA +VA 4.5 5 5.5 V 7
Supply current at 500-kHz sample rate 5 6.2 mA 500-kHz sample rate; +VA = 4.5 V to 5.5 V 7
Supply current NAP/Auto-NAP mode 0.3 0.5 mA NAP/Auto-NAP mode 7
Deep power-down mode supply current 6 50 nA Deep power-down mode 7
Power dissipation 30 38.5 mW +VA = 5 V, +VBD = 5 V 7
Power dissipation 25.4 32 mW +VA = 5 V, +VBD = 1.8 V 7
Internal conversion clock frequency 10.9 12 12.6 MHz Internal clock; +VA = 4.5 V to 5.5 V 7
External serial clock SCLK as I/O and conversion clock 1 21 MHz As I/O clock and conversion clock 7
Input reference VREF (REF+ - REF-) VREF 0.3 4.096 4.2 V 5.5 V >= +VA >= 4.5 V 7
Reference input range (REF-) - AGND -0.1 0.1 V 7

CAD (KiCad official)

  • Symbol: ADS8328IPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ads8328ipwr-etched.step / ads8328ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8328ipwr.step / ads8328ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 5c33ee2f188eda36, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF