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ADS8321EB

Texas Instruments · Analog To Digital Converters (ADCs) · VSSOP-8

ADS8321EB from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREF power_in Reference input that sets the analog input range; the external reference can be any voltage from 500mV to VCC/2, and the external reference absolute maximum is +5.5V.
2 +In input Non-inverting analog input; it should remain within GND - 300mV to VCC + 300mV, outside which the converter's linearity may not meet specifications.
3 -In input Inverting analog input; it should remain within GND - 300mV to 4V, outside which the converter's linearity may not meet specifications.
4 GND power_in Ground pin, which should be placed on a clean ground point and kept away from microcontroller, microprocessor, or DSP ground connections.
5 CS/SHDN input Chip select when LOW; shutdown mode when HIGH, and a new conversion starts only when CS has been taken HIGH and returned LOW.
6 DOUT output Serial data output of 16 bits, valid on the falling edge of DCLOCK; the second DCLOCK pulse after the falling edge of CS enables the output, and after one null bit the data is valid for the next 16 edges.
7 DCLOCK input Data clock that synchronizes the serial data transfer and determines the conversion speed.
8 +VCC power_in Power supply input; specified performance is 4.75V to 5.25V, the VCC range is 2.7V to 5.25V, and the absolute maximum is +6V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Data Converters
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
No Missing Codes 15 Bits 3
Integral Linearity Error -0.012 0.006 0.012 % of FSR 3
Offset Error -1 0.2 1 mV 3
Offset Temperature Drift -1 1 1 µV/°C 3
Gain Error, Positive -0.024 0.024 % 3
Gain Error, Negative -0.024 0.024 % 3
Gain Temperature Drift -0.3 0.3 ppm/°C 3
Absolute Input Range (+In) -0.1 V 3
Absolute Input Range (-In) -0.1 4 V 3
Common-Mode Rejection Ratio 80 dB 3
Power Supply Rejection Ratio 3 LSB +4.7V < VCC < 5.25V 3
Clock Frequency Range 0.024 2.9 MHz 3
Input High Voltage VIH 3 V IIH = +5µA 3
Input Low Voltage VIL -0.3 0.8 V IIL = +5µA 3
Output High Voltage VOH 4 V IOH = -250µA 3
Output Low Voltage VOL 0.4 V IOL = 250µA 3
VCC Specified Performance 4.75 5.25 V 3
VCC Range 2.7 5.25 V 3
Quiescent Current 1100 1700 µA 3
Power Dissipation 5.5 8.5 mW 3
Power Down Supply Current 0.3 3 µA CS = VCC 3
Specified Performance (temperature range) -40 85 °C 3
Reference Input Voltage Range 0.5 V 3
Reference Current Drain 40 80 µA 3
Reference Current Drain (power down) 0.1 3 µA CS = VCC 3
Leakage Current 1 nA 3
Analog Input Sample Time tSMPL 4.5 5 Clk Cycles 9
CS Falling to DCLOCK Rising tSUCS 20 ns 9
DCLOCK Falling to DOUT Not Valid (hold) thDO 5 15 ns 9
DCLOCK Falling to Next DOUT Valid tdDO 30 50 ns 9
CS Rising to DOUT Tri-State tdis 70 100 ns 9
DCLOCK Falling to DOUT Enabled ten 20 50 ns 9
DOUT Fall Time tf 5 25 ns 9
DOUT Rise Time tr 7 25 ns 9
VCC Supply Voltage (absolute maximum) VCC 6 V 2
Analog Input (absolute maximum) -0.3 V 2
Logic Input (absolute maximum) -0.3 6 V 2
Case Temperature (absolute maximum) 100 °C 2
Junction Temperature (absolute maximum) 150 °C 2
Storage Temperature (absolute maximum) 125 °C 2
External Reference Voltage (absolute maximum) 5.5 V 2

CAD (KiCad official)

  • Symbol: ADS8321EB
  • Footprint: Package_SO:VSSOP-8_3x3mm_P0.65mm
  • 3D model: VSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.1 mm tall, datasheet A, max). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: ads8321eb-2k5-etched.step / ads8321eb-2k5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8321eb-2k5.step / ads8321eb-2k5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 8172760a1091a893, retrieved 2026-11-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF