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ADS8318IBDGST

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Texas Instruments Analog To Digital Converters (ADCs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionads8318ibdgstfactory-2.0.0extractor-text

Verified ADS8318IBDGST

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 10 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ADS8318IBDGST · VSSOP-10-0.5mm · 10 pins
  • ✓copper: 10 copper pads, none touching another net
  • ✓datasheet: all 10 pin names found in the 33-page datasheet
  • ✓distributor: lcsc C2871930, digikey 296-23807-2-ND, mouser 595-ADS8318IBDGST
  • ✓family: MSOP-10_3x3mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-dwxxs4_c/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.26)
  • ✓pads: 10 pins = 10 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 10 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ads8318ibdgst.kicad_sym✓ ads8318ibdgst.kicad_mod✓ ads8318ibdgst.step
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Ray Publish 0.1.0 e65d3a4 4d ago

ADS8318IBDGST

Texas Instruments · Analog To Digital Converters (ADCs) · VSSOP-10-0.5mm

ADS8318IBDGST from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REFIN input Positive reference input; decouple with the GND pin using a 0.1-μF bypass capacitor and a 10-μF storage capacitor.
2 +VA power_in Analog power supply, decoupled with the GND pin; the specification conditions use +VA = 5 V.
3 +IN input Noninverting analog signal input of the unipolar differential input, whose swing is -Vref to +Vref about a common-mode of +Vref/2.
4 -IN input Inverting analog signal input of the unipolar differential input, whose swing is -Vref to +Vref about a common-mode of +Vref/2.
5 GND power_in Device ground, common to both the analog supply (+VA) and the digital I/O supply (+VBD).
6 CONVST input Convert input that starts a conversion; it also functions as the CS input in 3-wire interface mode.
7 SDO output Serial data output; data is synchronized with SCLK.
8 SCLK input Serial I/O clock input; the data on SDO is synchronized with this clock.
9 SDI input Serial data input; its level at the start of a conversion selects CS or daisy-chain mode, and it also serves as the CS input in 4-wire interface mode.
10 +VBD power_in Digital I/O power supply, decoupled with the GND pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-10-0.5mm
Category ADC/DAC/Data Conversion
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
+IN input voltage -0.3 V 2
+IN input current -130 130 mA 2
-IN input voltage -0.3 V 2
-IN input current -130 130 mA 2
+VA to AGND -0.3 7 V 2
+VBD to BDGND -0.3 7 V 2
Digital input voltage to GND -0.3 V 2
Digital output to GND -0.3 V 2
Operating free-air temperature range TA -40 85 °C 2
Storage temperature range Tstg -65 150 °C 2
Junction temperature (TJ max) TJ 150 °C 2
MSOP package thermal impedance θJA 180 °C/W MSOP package 2
Integral linearity (ADS8318IB) INL -1 0.65 1 LSB 3
Differential linearity (ADS8318IB) DNL -0.75 0.4 0.75 LSB At 16-bit level 3
Offset error EO -1.5 0.3 1.5 mV 3
Gain error EG -0.03 0.003 0.03 %FSR 3
Input common-mode range 0 V 3
Input leakage current 1000 pA During acquisition 3
External reference input range (Vref) Vref 2.048 4.096 V 4
Reference input current 250 μA During conversion 4
Power supply voltage +VBD +VBD 2.375 3.3 5.5 V 4
Power supply voltage +VA +VA 4.5 5 5.5 V 4
Supply current +VA IVA 3.6 4.5 mA 500-kHz sample rate 4
Power dissipation PVA 18 22.5 mW +VA = 5 V, 500-kHz sample rate 4
Device power-down current IVApd 50 300 nA +VA = 5 V 4
Low-level input voltage VIL -0.3 V IIL = 5 μA 4
Low-level output voltage VOL 0 0.4 V IOL = 2 TTL loads 4
Operating free-air temperature TA -40 85 °C 4
CONVST high pulse duration t1 10 ns +VA = 5 V, +VBD ≥ 3.1 V 5
CONVST low pulse duration t6 20 ns +VA = 5 V, +VBD ≥ 3.1 V 5
Time between conversions tcyc 2000 ns +VA = 5 V, +VBD ≥ 3.1 V 5
SCLK period tclk 20 ns +VA = 5 V, +VBD ≥ 3.1 V 5
SCLK low time tclkl 8 ns +VA = 5 V, +VBD ≥ 3.1 V 5
SCLK high time tclkh 8 ns +VA = 5 V, +VBD ≥ 3.1 V 5
SCLK falling edge to next data valid delay t3 16 ns +VA = 5 V, +VBD ≥ 3.1 V 5
Enable time, CONVST or SDI low to MSB valid ten 15 ns +VA = 5 V, +VBD ≥ 3.1 V 5
Disable time, CONVST or SDI high or last SCLK falling edge to SDO 3-state tdis 12 ns +VA = 5 V, +VBD ≥ 3.1 V 5
SCLK period tclk 30 ns +VA = 5 V, 3.1 V > +VBD ≥ 2.375 V 6
SCLK low time tclkl 13 ns +VA = 5 V, 3.1 V > +VBD ≥ 2.375 V 6
SCLK high time tclkh 13 ns +VA = 5 V, 3.1 V > +VBD ≥ 2.375 V 6
SCLK falling edge to next data valid delay t3 24 ns +VA = 5 V, 3.1 V > +VBD ≥ 2.375 V 6
Enable time, CONVST or SDI low to MSB valid ten 22 ns +VA = 5 V, 3.1 V > +VBD ≥ 2.375 V 6
Disable time, CONVST or SDI high or last SCLK falling edge to SDO 3-state tdis 15 ns +VA = 5 V, 3.1 V > +VBD ≥ 2.375 V 6
Common-mode rejection ratio CMRR 78 dB With common mode input signal = 200 mVp-p at 500 kHz 3
Power supply rejection ratio PSRR 80 dB At FFF0h output code 3
Transition noise 0.25 LSB 3
Maximum throughput rate 0.5 MHz With or without latency 3
Aperture delay 2.5 ns 3
Aperture jitter, RMS 6 ps 3
-3dB small-signal bandwidth 15 MHz 4
Total harmonic distortion at 1 kHz THD -114 dB VIN 0.4 dB below FS at 1 kHz, Vref = 5 V 4
Total harmonic distortion at 10 kHz THD -108 dB VIN 0.4 dB below FS at 10 kHz, Vref = 5 V 4
Total harmonic distortion at 100 kHz THD -91.5 dB VIN 0.4 dB below FS at 100 kHz, Vref = 5 V 4
Signal-to-noise ratio at 1 kHz (IB) SNR 95.5 dB VIN 0.4 dB below FS at 1 kHz, Vref = 5 V 4
Signal-to-noise ratio at 10 kHz SNR 95.2 dB VIN 0.4 dB below FS at 10 kHz, Vref = 5 V 4
Signal-to-noise ratio at 100 kHz SNR 92.5 dB VIN 0.4 dB below FS at 100 kHz, Vref = 5 V 4
Conversion time tCONV 1400 ns +VBD = 5 V 3
Acquisition time tacq 600 ns +VBD = 5 V 3

CAD (KiCad official)

  • Symbol: ADS8318IBDGST
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
  • 3D model files: ads8318ibdgst-etched.step / ads8318ibdgst-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8318ibdgst.step / ads8318ibdgst.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 dfebebe4d3a1fbce, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF