component
ADS825E
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
| ads825e-etched.glb | 16d ago |
| ads825e-etched.step | 16d ago |
| ads825e-hero.glb | 16d ago |
| ads825e-hero.overlay.json | 16d ago |
| ads825e.glb | 16d ago |
| ads825e.kicad_mod | 16d ago |
| ads825e.kicad_sym | 16d ago |
| ads825e.lbr | 16d ago |
| ads825e.step | 16d ago |
| package.json | 16d ago |
| page.json | 16d ago |
| README.md | 16d ago |
ADS825E
Texas Instruments · Analog To Digital Converters (ADC) · SSOP-28-208mil
ADS825E from Texas Instruments, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; all ground connections on the device are internally joined and should connect to an analog ground plane. |
| 2 | D9 | tri_state | Data bit 1, the MSB of the positive straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 3 | D8 | tri_state | Data bit 2 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 4 | D7 | tri_state | Data bit 3 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 5 | D6 | tri_state | Data bit 4 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 6 | D5 | tri_state | Data bit 5 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 7 | D4 | tri_state | Data bit 6 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 8 | D3 | tri_state | Data bit 7 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 9 | D2 | tri_state | Data bit 8 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 10 | D1 | tri_state | Data bit 9 of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 11 | D0 | tri_state | Data bit 10, the LSB of the straight offset binary output; output goes high-impedance when OE is HI and recommended load is 15 pF or less. |
| 12 | OE | input | Output enable: HI puts the data outputs in high-impedance state, LO gives normal operation; the pin has an internal 50 kΩ pull-down. |
| 13 | PD | input | Power-down control: HI enables power-down mode, which reduces power dissipation to 20 mW, and LO disables it. |
| 14 | CLK | input | Convert clock input; data is converted on the rising edge with a 25 ns minimum period and a 50% duty cycle with edges of 2 ns or less recommended, and the pin accepts 3 V or 5 V logic levels. |
| 15 | +VS | power_in | +5 V analog supply; operating range is +4.75 V to +5.25 V. |
| 16 | GND | power_in | Ground pin; connect to the analog ground plane together with the other ground pins. |
| 17 | RSEL | input | Input range select: HI selects a 2 V full-scale range and LO selects a 1 V full-scale range. |
| 18 | INT/EXT | input | Reference select: HI selects the external reference and LO selects the internal reference. |
| 19 | REFB | passive | Bottom reference; nominal 1.5 V, and when an external reference is used its range is 1.25 V minimum up to REFT − 0.8 V. |
| 20 | ByB | passive | Bottom reference ladder bypass pin; no electrical limits for this pin are given in the datasheet text provided. |
| 21 | ByT | passive | Top reference ladder bypass pin; no electrical limits for this pin are given in the datasheet text provided. |
| 22 | REFT | passive | Top reference; nominal 3.5 V, and when an external reference is used its range is REFB + 0.8 V minimum up to VS − 1.25 V. |
| 23 | CM | output | Common-mode voltage output, which is the bias voltage to tie the complementary input IN− to for single-ended operation. |
| 24 | IN- | input | Complementary analog input (−); tie to CM for single-ended operation or drive differentially with IN+. |
| 25 | IN+ | input | Analog input (+); standard single-ended input range is 1.5 V to 3.5 V (2 Vp-p), with the optional 1 Vp-p range selected via RSEL. |
| 26 | GND | power_in | Analog ground pin; connect to the analog ground plane. |
| 27 | +VS | power_in | +5 V supply; operating range is +4.75 V to +5.25 V. |
| 28 | VDRV | power_in | Output logic driver supply; set to +5 V or +3 V to match the interfacing logic, with +3 V recommended to lower output-stage dissipation and switching glitches. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-28-208mil |
| Category | Data Acquisition |
| Pins | 28 |
CAD (KiCad official)
- Symbol:
ADS825E - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files:
ads825e-etched.step/ads825e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads825e.step/ads825e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (21 pp, sha256
1e618dddb9c6d73d, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).