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Contents

README

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ADS8028IRTJR

Texas Instruments · Analog To Digital Converters (ADC) · QFN-20-EP(4x4)

ADS8028IRTJR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN3 input Analog input channel 3, with an input range of 0 V to VREF.
2 AIN4 input Analog input channel 4, with an input range of 0 V to VREF.
3 AIN5 input Analog input channel 5, with an input range of 0 V to VREF.
4 AIN6 input Analog input channel 6, with an input range of 0 V to VREF.
5 AIN7 input Analog input channel 7, with an input range of 0 V to VREF.
6 AGND power_in Analog ground; DGND to AGND must remain within -0.3 V to +0.3 V.
7 REF bidirectional ADC internal reference output or external reference input; REF to AGND is limited to AVDD + 0.3 V.
8 NC unconnected No internal connection; a passive component on this pin does not affect device functionality.
9 DGND power_in Digital ground for the digital interface; DGND to AGND must remain within -0.3 V to +0.3 V.
10 AVDD power_in ADC operation supply, 2.7 V to 5.25 V; DVDD must not exceed AVDD + 0.3 V.
11 CS input Active-low chip select; the ADS8028 samples the analog input on the CS falling edge and digital inputs are limited to DVDD + 0.3 V.
12 TM_BUSY output Busy output that stays high during conversion, including the up-to-100 µs temperature sensor conversion; digital outputs are limited to DVDD + 0.3 V.
13 DIN input SPI data input, latched on the first 16 SCLK falling edges after CS falls; setup time 5 ns and hold time 4 ns.
14 DOUT output SPI data output that leaves 3-state after CS falls and returns to 3-state on the 16th SCLK falling edge or CS rising edge.
15 SCLK input SPI serial clock input, up to 20 MHz, used for both conversion and data transfer.
16 DVDD power_in ADC interface supply, 1.65 V to 5.25 V; must satisfy DVDD ≤ AVDD + 0.3 V.
17 PD/RST input Active-low dual-function pin: a low pulse under 60 ns resets the device, while a low pulse over 90 ns powers it down.
18 AIN0 input Analog input channel 0, with an input range of 0 V to VREF.
19 AIN1 input Analog input channel 1, with an input range of 0 V to VREF.
20 AIN2 input Analog input channel 2, with an input range of 0 V to VREF.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20-EP(4x4)
Category Data Acquisition
Pins 21

CAD (KiCad official)

  • Symbol: ADS8028IRTJR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: ads8028irtjr-etched.step / ads8028irtjr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8028irtjr.step / ads8028irtjr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 2f47b48c9576bc45, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF