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ADS7961SRHBR
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Texas Instruments Analog To Digital Converters (ADC), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ADS7961SRHBR
Texas Instruments · Analog To Digital Converters (ADC) · VQFN-32-EP(5x5)
ADS7961SRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | Analog ground pin of the ADC and multiplexer. |
| 2 | MXO | output | Multiplexer output that feeds the ADC analog input path. |
| 3 | AINP | input | ADC analog input signal pin, referenced to AINM. |
| 4 | AINM | input | ADC analog input ground pin, to which AINP is referenced. |
| 5 | CH15 | input | Analog input channel 15 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 6 | CH14 | input | Analog input channel 14 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 7 | CH13 | input | Analog input channel 13 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 8 | CH12 | input | Analog input channel 12 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 9 | CH11 | input | Analog input channel 11 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 10 | CH10 | input | Analog input channel 10 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 11 | CH9 | input | Analog input channel 9 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 12 | CH8 | input | Analog input channel 8 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 13 | CH7 | input | Analog input channel 7 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 14 | CH6 | input | Analog input channel 6 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 15 | CH5 | input | Analog input channel 5 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 16 | CH4 | input | Analog input channel 4 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 17 | CH3 | input | Analog input channel 3 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 18 | CH2 | input | Analog input channel 2 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 19 | CH1 | input | Analog input channel 1 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 20 | CH0 | input | Analog input channel 0 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 21 | +VA | power_in | Analog power supply; 2.7 V to 5.25 V recommended (3.3 V nominal). |
| 22 | AGND | power_in | Analog ground pin of the ADC and multiplexer. |
| 23 | CS | input | Active-low chip-select input; the ADC samples its input on the CS falling edge. |
| 24 | SCLK | input | Serial clock input; SCLK frequency up to 20 MHz. |
| 25 | SDI | input | Serial data input pin. |
| 26 | SDO | output | Serial data output pin. |
| 27 | BDGND | power_in | Digital ground for the digital I/O supply domain. |
| 28 | +VBD | power_in | Digital I/O supply; 1.7 V to +VA. |
| 29 | GPIO0 | bidirectional | General-purpose input or output; configurable as the active-high alarm output. |
| 30 | REFM | input | Reference ground pin for the external reference input. |
| 31 | REFP | input | Reference input; 2 V to 3 V recommended range (2.5 V nominal), with a 10 µF decoupling capacitor between REFP and REFM. |
| 32 | +VA | power_in | Analog power supply; 2.7 V to 5.25 V recommended (3.3 V nominal). |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Data Acquisition |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
ADS7961SRHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ads7961srhbr-etched.step/ads7961srhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads7961srhbr.step/ads7961srhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (87 pp, sha256
8ef9ce324ee60500, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ADS7961SRHBR
**Texas Instruments** · Analog To Digital Converters (ADC) · VQFN-32-EP(5x5)
ADS7961SRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | Analog ground pin of the ADC and multiplexer. |
| 2 | MXO | output | Multiplexer output that feeds the ADC analog input path. |
| 3 | AINP | input | ADC analog input signal pin, referenced to AINM. |
| 4 | AINM | input | ADC analog input ground pin, to which AINP is referenced. |
| 5 | CH15 | input | Analog input channel 15 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 6 | CH14 | input | Analog input channel 14 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 7 | CH13 | input | Analog input channel 13 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 8 | CH12 | input | Analog input channel 12 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 9 | CH11 | input | Analog input channel 11 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 10 | CH10 | input | Analog input channel 10 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 11 | CH9 | input | Analog input channel 9 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 12 | CH8 | input | Analog input channel 8 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 13 | CH7 | input | Analog input channel 7 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 14 | CH6 | input | Analog input channel 6 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 15 | CH5 | input | Analog input channel 5 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 16 | CH4 | input | Analog input channel 4 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 17 | CH3 | input | Analog input channel 3 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 18 | CH2 | input | Analog input channel 2 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 19 | CH1 | input | Analog input channel 1 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 20 | CH0 | input | Analog input channel 0 of the multiplexer; AINP or CHn to AGND must stay between -0.3 V and VA + 0.3 V. |
| 21 | +VA | power_in | Analog power supply; 2.7 V to 5.25 V recommended (3.3 V nominal). |
| 22 | AGND | power_in | Analog ground pin of the ADC and multiplexer. |
| 23 | CS | input | Active-low chip-select input; the ADC samples its input on the CS falling edge. |
| 24 | SCLK | input | Serial clock input; SCLK frequency up to 20 MHz. |
| 25 | SDI | input | Serial data input pin. |
| 26 | SDO | output | Serial data output pin. |
| 27 | BDGND | power_in | Digital ground for the digital I/O supply domain. |
| 28 | +VBD | power_in | Digital I/O supply; 1.7 V to +VA. |
| 29 | GPIO0 | bidirectional | General-purpose input or output; configurable as the active-high alarm output. |
| 30 | REFM | input | Reference ground pin for the external reference input. |
| 31 | REFP | input | Reference input; 2 V to 3 V recommended range (2.5 V nominal), with a 10 µF decoupling capacitor between REFP and REFM. |
| 32 | +VA | power_in | Analog power supply; 2.7 V to 5.25 V recommended (3.3 V nominal). |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Data Acquisition |
| Pins | 33 |
## CAD (KiCad official)
- Symbol: `ADS7961SRHBR`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `ads7961srhbr-etched.step` / `ads7961srhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads7961srhbr.step` / `ads7961srhbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads7955) (87 pp, sha256 `8ef9ce324ee60500`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ads7961srhbr-datasheet.pdf)