component
ADS7957SRHBR
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Texas Instruments Analog To Digital Converters (ADCs), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownADS7957SRHBR
Texas Instruments · Analog To Digital Converters (ADCs) · VQFN-32-EP(5x5)
ADS7957SRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | Analog ground. |
| 2 | MXO | output | Multiplexer output. |
| 3 | AINP | input | ADC input signal. |
| 4 | AINM | input | ADC input ground. |
| 5 | CH15 | input | Analog-input channel 15 for the multiplexer. |
| 6 | CH14 | input | Analog-input channel 14 for the multiplexer. |
| 7 | CH13 | input | Analog-input channel 13 for the multiplexer. |
| 8 | CH12 | input | Analog-input channel 12 for the multiplexer. |
| 9 | CH11 | input | Analog-input channel 11 for the multiplexer. |
| 10 | CH10 | input | Analog-input channel 10 for the multiplexer. |
| 11 | CH9 | input | Analog-input channel 9 for the multiplexer. |
| 12 | CH8 | input | Analog-input channel 8 for the multiplexer. |
| 13 | CH7 | input | Analog-input channel 7 for the multiplexer. |
| 14 | CH6 | input | Analog-input channel 6 for the multiplexer. |
| 15 | CH5 | input | Analog-input channel 5 for the multiplexer. |
| 16 | CH4 | input | Analog-input channel 4 for the multiplexer. |
| 17 | CH3 | input | Analog-input channel 3 for the multiplexer. |
| 18 | CH2 | input | Analog-input channel 2 for the multiplexer. |
| 19 | CH1 | input | Analog-input channel 1 for the multiplexer. |
| 20 | CH0 | input | Analog-input channel 0 for the multiplexer (default channel after power-up or reset). |
| 21 | +VA | power_in | Analog power supply, 2.7 V to 5.25 V recommended operating range. |
| 22 | AGND | power_in | Analog ground. |
| 23 | CS | input | Chip-select input, active low. |
| 24 | SCLK | input | Serial clock input, up to 20 MHz. |
| 25 | SDI | input | Serial data input. |
| 26 | SDO | output | Serial data output. |
| 27 | BDGND | power_in | Digital ground. |
| 28 | +VBD | power_in | Digital I/O supply, 1.7 V to +VA recommended operating range. |
| 29 | GPIO0 | bidirectional | Programmable general-purpose input or output that can alternatively serve as an active-high alarm output. |
| 30 | REFM | input | Reference ground. |
| 31 | REFP | input | Reference input; 2.5 V reference with a 10 µF ceramic decoupling capacitor to REFM. |
| 32 | +VA | power_in | Analog power supply, 2.7 V to 5.25 V recommended operating range. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | ADC/DAC/Data Conversion |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| AINP or CHn to AGND | -0.3 | V | 10 | ||||
| +VA to AGND, +VBD to BDGND | -0.3 | 7 | V | 10 | |||
| Digital input voltage to BDGND | -0.3 | 7 | V | 10 | |||
| Digital output to BDGND | -0.3 | V | 10 | ||||
| Input current to any pin except supply pins | -10 | 10 | mA | 10 | |||
| Operating temperature | -40 | 125 | °C | 10 | |||
| Junction temperature (TJ Max) | TJ | 150 | °C | 10 | |||
| Storage temperature (Tstg) | Tstg | -65 | 150 | °C | 10 | ||
| Analog power-supply voltage | V(+VA) | 2.7 | 3.3 | 5.25 | V | 10 | |
| Digital I/O-supply voltage | V(+VBD) | 1.7 | 3.3 | V | 10 | ||
| Reference voltage | V(REF) | 2 | 2.5 | 3 | V | 10 | |
| SCLK frequency | ƒ(SCLK) | 20 | MHz | 10 | |||
| Operating temperature range | TA | -40 | 125 | °C | 10 | ||
| Full-scale input span, Range 1 | 0 | V | Range 1 | 14 | |||
| Full-scale input span, Range 2 | 0 | V | while 2xVREF ≤ +VA | 14 | |||
| Absolute input range, Range 1 | -0.2 | V | Range 1 | 14 | |||
| Absolute input range, Range 2 | -0.2 | V | while 2xVREF ≤ +VA | 14 | |||
| Integral linearity | -0.5 | 0.2 | 0.5 | LSB | 14 | ||
| Differential linearity | -0.5 | 0.2 | 0.5 | LSB | 14 | ||
| Offset error | -1.5 | 0.5 | 1.5 | LSB | Measured relative to an ideal full-scale input | 14 | |
| Gain error, Range 1 | -1 | 0.1 | 1 | LSB | Range 1 | 14 | |
| Alarm high threshold range | 0 | 4092 | LSB | 14 | |||
| Alarm low threshold range | 0 | 4092 | LSB | 14 | |||
| Logic low input voltage | VIL | 0.8 | V | +VBD = 5 V | 15 | ||
| Logic low input voltage | VIL | 0.4 | V | +VBD = 3 V | 15 | ||
| Low-level output voltage | VOL | 0.4 | V | At Isink = 200 μA | 15 | ||
| Analog power-supply voltage | +VA | 2.7 | 3.3 | 5.25 | V | 15 | |
| Digital I/O supply voltage | +VBD | 1.7 | 3.3 | 5.25 | V | 15 | |
| Supply current (normal mode), static state | 1.05 | 1 | mA | At +VA = 2.7 to 3.6 V static state | 15 | ||
| Supply current (normal mode), 1 MHz throughput | 2.3 | 3 | mA | At +VA = 4.7 to 5.25 V and 1 MHz throughput | 15 | ||
| Supply current (normal mode), static state | 1.1 | 1.5 | mA | At +VA = 4.7 to 5.25 V static state | 15 | ||
| Junction-to-ambient thermal resistance | RθJA | 40.6 | °C/W | 11 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 32.1 | °C/W | 11 | |||
| Junction-to-board thermal resistance | RθJB | 13.1 | °C/W | 11 | |||
| Junction-to-top characterization parameter | ψJT | 0.8 | °C/W | 11 | |||
| Junction-to-board characterization parameter | ψJB | 13 | °C/W | 11 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 5.7 | °C/W | 11 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | • A copper fill area underneath the device ties the AGND, BDGND, AINM, and REFM pins together. This | 52 |
CAD (KiCad official)
- Symbol:
ADS7957SRHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ads7957srhbr-etched.step/ads7957srhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads7957srhbr.step/ads7957srhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (80 pp, sha256
89c0b3de229df440, retrieved 2026-10-28, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).