component
ADS7854IPWR
Public Made by Adomby adom
Texas Instruments Analog To Digital Converters (ADC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS7854IPWR
Texas Instruments · Analog To Digital Converters (ADC) · TSSOP-16
ADS7854IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AINP_A | input | Positive analog input for channel A, which the datasheet limits to -0.3 V to AVDD + 0.3 V with respect to REFGND_A. |
| 2 | AINM_A | input | Negative analog input for channel A of the fully-differential input pair, limited to -0.3 V to AVDD + 0.3 V with respect to REFGND_A. |
| 3 | REFIO_A | bidirectional | Reference voltage input/output for channel A, limited to -0.3 V to AVDD + 0.3 V with respect to REFGND_A. |
| 4 | REFGND_A | power_in | Reference ground potential for channel A, which must stay within 0.3 V of GND ( |
| 5 | REFGND_B | power_in | Reference ground potential for channel B, which must stay within 0.3 V of GND ( |
| 6 | REFIO_B | bidirectional | Reference voltage input/output for channel B, limited to -0.3 V to AVDD + 0.3 V with respect to REFGND_B. |
| 7 | AINM_B | input | Negative analog input for channel B of the fully-differential input pair, limited to -0.3 V to AVDD + 0.3 V with respect to REFGND_B. |
| 8 | AINP_B | input | Positive analog input for channel B, which the datasheet limits to -0.3 V to AVDD + 0.3 V with respect to REFGND_B. |
| 9 | DVDD | power_in | Digital I/O supply with a recommended value of 3.3 V, and an absolute maximum of 6 V with respect to GND. |
| 10 | SDI | input | Serial data input for the serial interface, with digital input voltage limited to GND - 0.3 V to DVDD + 0.3 V. |
| 11 | CS | input | Active-low chip-select input; a falling edge brings the serial data bus out of 3-state, and digital input voltage is limited to GND - 0.3 V to DVDD + 0.3 V. |
| 12 | SCLK | input | Serial communication clock input, with digital input voltage limited to GND - 0.3 V to DVDD + 0.3 V. |
| 13 | SDO_A | tri_state | Serial data output for channel A (and for both channels in single-SDO mode), which goes to 3-state when CS is high. |
| 14 | SDO_B | tri_state | Serial data output for channel B, which stays in 3-state in single-SDO mode and can be left unconnected in that mode. |
| 15 | GND | power_in | Digital ground; digital input voltage is referenced to GND, and |
| 16 | AVDD | power_in | Analog supply for ADC operation with a recommended value of 5 V, and an absolute maximum of 6 V with respect to REFGND_x. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Data Acquisition |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
ADS7854IPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ads7854ipwr-etched.step/ads7854ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads7854ipwr.step/ads7854ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (74 pp, sha256
9dc9513f58274162, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).